AD9832BRU Analog Devices Inc, AD9832BRU Datasheet - Page 17

• Manufacturer Part Number: AD9832BRU
• Description: D/A Converter (D-A) IC
• Manufacturer: Analog Devices Inc

Specifications of AD9832BRU

• No. Of Pins: 16
• Peak Reflow Compatible (260 C): No
• No. Of Bits: 10 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Interface Type: Serial
• Package / Case: 16-TSSOP
• Rohs Status: RoHS non-compliant
• Resolution (bits): 10 b
• Master Fclk: 25MHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 2.97 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-AD9832EBZ - BOARD EVAL FOR AD9832
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

V
OUT
= V
CHANGE FSELECT
REFIN
× 6.25 × R
WAIT 6 MCLK CYCLES (8 MCLK CYCLES IF SYNC = 1)
PHASEREG [3:0] = DELTA PHASE[0, 1, 2, 3]
OUT
Figure 24. Flowchart for the AD9832 Initialization and Operation
/R
NO
NO
SET PINS OR FREQUENCY/PHASE REGISTER WRITE
SET
FREG[0] =
FREG[1] =
SELECT DATA SOURCES
SET SYNC AND/OR SELSRC TO 1
× (1 + SIN(2π(FREG × f
SET PSEL0, PSEL1
PHASEREG[3:0] = DELTA PHASE[0, 1, 2, 3]
CHANGE PHASE?
CONTROL REGISTER WRITE
CHANGE
CHANGE
SET FSELECT
DAC OUTPUT
DATA WRITE
SET FSELECT, PSEL0 AND PSEL1
f
f
OUT0
OUT1
INITIALIZATION
CONTROL REGISTER WRITE
FREG[0] =
FREG[1] =
SET SLEEP
RESET = 1
YES
YES
NO
CLR = 1
WRITE INITIAL DATA
f
f
/
/
f
f
OUT
OUT
MCLK
MCLK
Figure 25. Initialization
Rev. B | Page 17 of 24
NO
?
?
SLEEP = 0
RESET = 0
CLR = 0
f
f
× 2
× 2
OUT0
OUT1
32
32
MCLK
YES
/
/
CHANGE PHASEREG?
f
f
MCLK
MCLK
CONTROL REGISTER WRITE
× t/2
× 2
× 2
32
YES
32
32
SELSRC = 1
+ PHASEREG/2
SYNC = 1
AND/OR
YES
INITIALIZATION
NO
12
)))
CHANGE PSEL0, PSEL1
AD9832