AD9834BRU Analog Devices Inc, AD9834BRU Datasheet - Page 19

• Manufacturer Part Number: AD9834BRU
• Description: 10 Bit, 20 Pin DDS I.C.
• Manufacturer: Analog Devices Inc

Specifications of AD9834BRU

• Rohs Status: RoHS non-compliant
• Design Resources: Amplitude Control Circuit for AD9834 Waveform Generator (CN0156)
• Resolution (bits): 10 b
• Master Fclk: 50MHz
• Tuning Word Width (bits): 28 b
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-AD9834EBZ - BOARD EVAL FOR AD9834
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DB15
0
Table 6. Description of Bits in the Control Register
Bit
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB14
0
Name
B28
HLB
FSEL
PSEL
PIN/SW
RESET
SLEEP1
SLEEP12
DB13
B28
MODE + OPBITEN
SLEEP12
SLEEP1
SIGN/PIB
OPBITEN
Description
Two write operations are required to load a complete word into either of the frequency registers.
contains the 14 LSBs of the frequency word and the next write contains the 14 MSBs. The first two bits of each 16-bit
word define the frequency register the word is loaded to and should, therefore, be the same for both of the
consecutive writes. Refer to Table 10 for the appropriate addresses. The write to the frequency register occurs after both
words have been loaded. An example of a complete 28-bit write is shown in Table 11. Note however, that consecutive
28-bit writes to the same frequency register are not allowed, switch between frequency registers to do this type of
function.
containing the 14 LSBs. This means that the 14 MSBs of the frequency word can be altered independent of the 14 LSBs,
and vice versa. To alter the 14 MSBs or the 14 LSBs, a single write is made to the appropriate frequency address. The
Control Bit DB12 (HLB) informs the AD9834 whether the bits to be altered are the 14 MSBs or 14 LSBs.
This control bit allows the user to continuously load the MSBs or LSBs of a frequency register ignoring the remaining
14 bits. This is useful if the complete 28-bit resolution is not required. HLB is used in conjunction with DB13 (B28). This
control bit indicates whether the 14 bits being loaded are being transferred to the 14 MSBs or 14 LSBs of the addressed
frequency register. DB13 (B28) must be set to 0 to be able to change the MSBs and LSBs of a frequency word separately.
When DB13 (B28) = 1, this control bit is ignored.
The FSEL bit defines whether the FREQ0 register or the FREQ1 register is used in the phase accumulator. See Table 8 to
select a frequency register.
The PSEL bit defines whether the PHASE0 register data or the PHASE1 register data is added to the output of the phase
accumulator. See Table 9 to select a phase register.
Functions that select frequency and phase registers, reset internal registers, and power down the DAC can be
implemented using either software or hardware. PIN/SW selects the source of control for these functions.
RESET = 1 resets internal registers to 0, this corresponds to an analog output of midscale.
RESET = 0 disables RESET. This function is explained in the RESET Function section.
SLEEP1 = 1, the internal MCLK is disabled. The DAC output remains at its present value as the NCO is no longer
accumulating.
SLEEP1 = 0, MCLK is enabled. This function is explained in the SLEEP Function section.
SLEEP12 = 1 powers down the on-chip DAC. This is useful when the AD9834 is used to output the MSB of the DAC data.
SLEEP12 = 0 implies that the DAC is active. This function is explained in the SLEEP Function section.
B28 = 1 allows a complete word to be loaded into a frequency register in two consecutive writes. The first write
B28 = 0, the 28-bit frequency register operates as two 14-bit registers, one containing the 14 MSBs and the other
HLB = 1 allows a write to the 14 MSBs of the addressed frequency register.
HLB = 0 allows a write to the 14 LSBs of the addressed frequency register.
PIN/SW = 1 implies that the functions are being controlled using the appropriate control pins.
PIN/SW = 0 implies that the functions are being controlled using the appropriate control bits.
DB12
HLB
ACCUMULATOR
(28-BIT)
PHASE
DB11
FSEL
DB10
PSEL
ROM
SIN
MUX
DB9
PIN/SW
0
1
Figure 29. Function of Control Bits
DIVIDE
0
1
BY 2
MUX
DB8
RESET
Rev. C | Page 19 of 36
MSB
DB7
SLEEP1
DB6
SLEEP12
1
0
MUX
COMPARATOR
(LOW POWER)
10-BIT DAC
DB5
OPBITEN
(ENABLE)
OUTPUT
DIGITAL
DB4
SIGN/PIB
IOUT
IOUTB
VIN
SIGN BIT OUT
DB3
DIV2
DB2
0
DB1
MODE
AD9834
DB0
0