ADSP-BF504BCPZ-3F Analog Devices Inc, ADSP-BF504BCPZ-3F Datasheet - Page 33

• Manufacturer Part Number: ADSP-BF504BCPZ-3F
• Description: Blackfin W/Processor & Executable Flash
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: Fixed Pointr

Specifications of ADSP-BF504BCPZ-3F

• Interface: CAN, EBI/EMI, I²C, IrDA, PPI, SPI, SPORT, UART/USART
• Clock Rate: 300MHz
• Non-volatile Memory: FLASH (16MB)
• On-chip Ram: 68kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.29V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 25. Clock Out Timing
1
2
3
Table 26. Power-Up Reset Timing
Parameter
Timing Requirements
t
Parameter
Switching Characteristics
t
t
t
The ADSP-BF504/ADSP-BF504F/ADSP-BF506F processor does not have a dedicated CLKOUT pin. Rather, the EXTCLK pin may be programmed to serve as CLKBUF or
The t
The t
RST
SCLK
SCLKH
SCLKL
CLKOUT. This parameter applies when EXTCLK is programmed to output CLKOUT.
_
IN
_
SCLK
SCLK
PWR
value is the inverse of the f
value does not account for the effects of jitter.
V
DD_SUPPLIES
CLKIN
RESET Deasserted after the V
Within Specification
CLKOUT
CLKOUT
CLKOUT
1
1
1
Period
Width High
Width Low
CLKOUT
SCLK
2,3
specification. Reduced supply voltages affect the best-case value of 10 ns listed here.
DDINT
, V
In
DDEXT
Figure
, V
Rev. 0 | Page 33 of 80 | December 2010
DDFLASH
t
12, V
RST_IN_PWR
Figure 12. Power-Up Reset Timing
, and CLKIN Pins are Stable and
Figure 11. Clock Out Timing
DD_SUPPLIES
t
is V
SCLK
ADSP-BF504/ADSP-BF504F/ADSP-BF506F
DDINT
, V
Min
10
4
4
DDEXT
, and V
V
DDEXT
= 1.8 V
DDFLASH
Max
t
SCLKL
Min
3500 × t
.
CKIN
t
SCLKH
Min
10
4
4
V
DDEXT
= 2.5 V/3.3 V
Max
Max
Unit
ns
Unit
ns
ns
ns