ADUM4160BRWZ-RL Analog Devices Inc, ADUM4160BRWZ-RL Datasheet - Page 9

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ADUM4160BRWZ-RL

Manufacturer Part Number
ADUM4160BRWZ-RL
Description
Full/Low Speed USB Digital Isolator
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheet

Specifications of ADUM4160BRWZ-RL

Design Resources
USB Hub Isolator Circuit (CN0158) USB Cable Isolator Circuit (CN0159) USB Peripheral Isolator Circuit (CN0160)
Inputs - Side 1/side 2
2/2
Number Of Channels
4
Isolation Rating
5000Vrms
Voltage - Supply
3.1 V ~ 5.5 V
Data Rate
12Mbps
Propagation Delay
60ns
Output Type
Logic
Package / Case
16-SOIC (0.300", 7.5mm Width)
Operating Temperature
-40°C ~ 105°C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
105C
Package Type
SOIC W
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUM4160BRWZ-RL
Manufacturer:
AD
Quantity:
101
Part Number:
ADUM4160BRWZ-RL
Manufacturer:
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Quantity:
20 000
Table 10. Truth Table, Control Signals, and Power (Positive Logic)
V
Input
H
L
L
H
X
X
X
1
H represents logic high input or output, L represents logic low input or output, X represents the don’t care logic input or output, and Z represents the high impedance
output state.
SPU
V
State
Powered
Powered
Powered
Powered
Powered
Unpowered X
Powered
BUS1
, V
DD1
V
V
State
Active
Active
Active
Active
Z
Z
UD+
UD−
,
V
Input
H
L
H
L
X
X
X
SPD
V
State
Powered
Powered
Powered
Powered
Powered
Powered
Unpowered
BUS2
, V
DD2
V
V
State
Active
Active
Active
Active
Z
Z
X
DD+
DD−
Rev. B | Page 9 of 16
,
V
Input
H
H
H
H
L
X
X
1
PIN
Notes
Input and output logic set for full speed logic convention
and timing.
Input and output logic set for low speed logic convention
and timing.
Not allowed: V
USB host detects communications error.
Not allowed: V
USB host detects communications error.
Upstream Side 1 presents a disconnected state to the USB
cable.
When power is not present on V
output drivers revert to high-Z within 32 bit times. The
downstream side initializes in high-Z state.
When power is not present on the V
disconnects the pull-up and disables the upstream drivers
within 32 bit times.
SPU
SPU
and V
and V
SPD
SPD
must be set to the same value.
must be set to the same value.
DD1
, the downstream data
DD2
, the upstream side
ADuM4160

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