CS4207-CNZ Cirrus Logic Inc, CS4207-CNZ Datasheet - Page 129

• Manufacturer Part Number: CS4207-CNZ
• Description: IC Low Pwr,4/6 HD Aud Codec W/HP Amp
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS4207-CNZ

• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 3
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 110
• Voltage - Supply, Analog: 2.97 V ~ 5.25 V
• Voltage - Supply, Digital: 2.97 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1796

DS880F1
6.15.6.2 S/PDIF RX/TX Interface Control (CIR = 0001h)
Bits
9:8
15
14
13
12
10
11
7
6
5
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read Only
Type
Default
00b
0b
0b
0b
0b
0b
0b
0b
0b
0b
Reserved
TX 2 Enable: Routes S/PDIF Transmitter 2 to
the GPIO1/DMIC_SDA2/SPDIF_OUT2 pin.
0 - The pin functions as GPIO1 or DMIC_SDA2,
according to DMIC2 Enable .
1 - The pin functions as SPDIF_OUT2, regard-
less of DMIC2 Enable .
Reserved
TX 2 Raw Data Mode : Enables AES3 Direct
Mode. In this mode, a direct copy of the received
NRZ data from the HD Audio bus is sent to
S/PDIF transmitter 2.
0 - Normal S/PDIF TX 2 Data Mode.
1 - Enable Raw S/PDIF TX 2 Data Mode.
RX To TX 2 Loopthru : This bit is used to enable
an internal loop through from the S/PDIF RX to
S/PDIF TX 2. The path is a straight digital mux
from input to output. No re-clocking is performed.
0 - Do not loop S/PDIF RX to S/PDIF TX 2.
1 - Enable S/PDIF RX to S/PDIF TX 2 loopthru.
RX A/B Chnl Status Select: Specifies the chan-
nel from which to extract the channel status bits.
‘0’b - Select channel A status.
‘1’b - Select channel B status.
Reserved
TX 1 Raw Data Mode : Enables AES3 Direct
Mode. In this mode, a direct copy of the received
NRZ data from the HD Audio bus is sent to
S/PDIF transmitter 1.
0 - Normal S/PDIF TX 1 Data Mode.
1 - Enable Raw S/PDIF TX 1 Data Mode.
RX Raw Data Mode : Enables AES3 Direct
Mode. In this mode, a direct copy of the received
NRZ data from the S/PDIF receiver including the
C, U, and V bits are transmitted to the HD Audio
bus. The time slot occupied by the Z bit is used
to indicate the location of the block start.
0 - Normal S/PDIF RX Data Mode.
1 - Enable Raw S/PDIF RX Data Mode.
RX To TX 1 Loopthru : This bit is used to enable
an internal loop through from the S/PDIF RX to
S/PDIF TX 1. The path is a straight digital mux
from input to output. No re-clocking is performed.
0 - Do not loop S/PDIF RX to S/PDIF TX 1.
1 - Enable S/PDIF RX to S/PDIF TX 1 loopthru.
Description
CS4207
129