CY7C1361C-100AXCT Cypress Semiconductor Corp, CY7C1361C-100AXCT Datasheet - Page 18

• Manufacturer Part Number: CY7C1361C-100AXCT
• Description: CY7C1361C-100AXCT
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1361C-100AXCT

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 9M (256K x 36)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Scan Register Sizes
Identification Codes
Document Number: 38-05541 Rev. *J
Instruction
Bypass
ID
Boundary scan order (119-ball BGA package)
Boundary scan order (165-ball FPBGA package)
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Instruction
Register Name
Code
000
001
010
100
101
011
110
111
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to high Z state.
Loads the ID register with the vendor ID code and places the register between TDI and TDO.
This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a high Z state.
Do Not Use: This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
Bit Size (× 36)
Description
32
71
71
3
1
CY7C1361C/CY7C1363C
Bit Size (× 18)
32
71
71
3
1
Page 18 of 34
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