EVAL-AD5245EBZ Analog Devices Inc, EVAL-AD5245EBZ Datasheet - Page 5

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EVAL-AD5245EBZ

Manufacturer Part Number
EVAL-AD5245EBZ
Description
EVALUATION BOARD I.C.
Manufacturer
Analog Devices Inc

Specifications of EVAL-AD5245EBZ

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TIMING CHARACTERISTICS
5 KΩ, 10 KΩ, 50 KΩ, 100 KΩ VERSIONS
V
Table 3.
Parameter
I
1
2
3
4
2
Typical specifications represent average readings at 25°C and V
Guaranteed by design and not subject to production test.
See timing diagram (
Standard I
C INTERFACE TIMING CHARACTERISTICS
DD
SCL Clock Frequency
t
t
t
t
t
t
t
t
t
t
BUF
HD;STA
LOW
HIGH
SU;STA
HD;DAT
SU;DAT
F
R
SU;STO
= 5 V ± 10% or 3 V ± 10%, V
Fall Time of Both SDA and SCL Signals
Rise Time of Both SDA and SCL Signals
Bus Free Time Between STOP and START
Low Period of SCL Clock
High Period of SCL Clock
Setup Time for Repeated START Condition
Hold Time (Repeated START)
Data Setup Time
Setup Time for STOP Condition
Data Hold Time
2
C mode operation guaranteed by design.
Figure 44
) for locations of measured values.
A
= V
DD
2, , 3 4
, V
B
(Specifications Apply to All Parts)
= 0 V, –40°C < T
DD
= 5 V.
Symbol
f
t
t
t
t
t
t
t
t
t
t
SCL
1
2
3
4
5
6
7
8
9
10
Rev. B | Page 5 of 20
A
< +125°C, unless otherwise noted.
Conditions
After this period, the first clock
pulse is generated.
Min
1.3
0.6
1.3
0.6
0.6
100
0.6
Typ
1
Max
400
0.9
300
300
AD5245
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs

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