EVAL-ADAU1446EBZ Analog Devices Inc, EVAL-ADAU1446EBZ Datasheet - Page 70

• Manufacturer Part Number: EVAL-ADAU1446EBZ
• Description: Evaluation BD 175MHZ SigmaDSP,8x2 SRCs
• Manufacturer: Analog Devices Inc
• Series: SigmaDSP®r

Specifications of EVAL-ADAU1446EBZ

• Main Purpose: Audio, Audio Processing
• Embedded: Yes, DSP
• Utilized Ic / Part: ADAU1446
• Primary Attributes: 28/56-bit, Audio DSP, Single-chip, Multichannel
• Secondary Attributes: I²C & SPI Interfaces
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAU1445/ADAU1446
Frame Clock Pad Strength Register (Address 0xE248)
This register controls the pad drive strength of all frame clock pins configured in master mode. The default 2 mA setting should be
adequate for most applications. The 6 mA setting should be used only when the integrity of the signal is compromised.
Table 69. Bit Descriptions of Frame Clock Pad Strength Register
Bit Position
[15:12]
[11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Description
Reserved
LRCLK11
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK10
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK9
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK8
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK7
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK6
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK5
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK4
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK3
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK2
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK1
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK0
0 = low strength (2 mA)
1 = high strength (6 mA)
Rev. A | Page 70 of 92
Default
0
0
0
0
0
0
0
0
0
0
0
0