TGF4124 TriQuint, TGF4124 Datasheet
TGF4124
Specifications of TGF4124
Available stocks
Related parts for TGF4124
TGF4124 Summary of contents
Page 1
... Nominal Pout of 12 Watts at 2.3 GHz • Nominal PAE of 51.5% at 2.3 GHz • Nominal Gain of 10 2.3 GHz • Die size 36.0 x 81.0 x 4.0 mils (0.914 x 2.057 x 0.102 mm) TGF4124-EPU RF Performance 2.3 GHz 2.17 A and T 50 Pout 48 PAE ...
Page 2
... TGF4124-EPU RF Performance for 2.3 GHz, and T Quiescent Id is 2.24 A (Vg = -1.1 V), 1.81 A (Vg = -1.3 V), and 1.37 A (Vg = -1.5 V) 140 130 120 110 100 - TriQuint Semiconductor Texas Phone: 972 994-8465 Pout Input Power (dBm) Fax 972 994-8504 = Tch - ...
Page 3
... TGF4124-EPU RF Performance for 2.3 GHz, and T Quiescent Id is 2.17 A (Vg = -1.1 V), 1.80 A (Vg = -1.3 V), and 1.40 A (Vg = -1.5 V) 150 140 130 120 110 100 - TriQuint Semiconductor Texas Phone: 972 994-8465 Pout Input Power (dBm) Fax 972 994-8504 = Tch 37 36 ...
Page 4
... TGF4124-EPU RF Performance for 2.3 GHz, and T Quiescent Id is 2.11 A (Vg = -1.79 V), 1.79 A (Vg = -1.3 V), and 1.43 A (Vg = -1.5 V) 170 160 150 140 130 120 110 100 - TriQuint Semiconductor Texas Phone: 972 994-8465 Pout Input Power(dBm) Fax 972 994-8504 = Tch ...
Page 5
... DC Characteristics for the TGF4124-EPU DC probe Parameters IDSS Drain Saturation Current GM Transconductance VP Pinch Off Voltage BVGS Breakdown Voltage Gate-Source BVGD Breakdown Voltage Gate-Drain -2. 0.25 steps Absolute Maximum Ratings Drain-to-source Voltage, Vds..............................… … … … … … … … … … … … … … … … ..........12 V Gate-to-source Voltage, Vgs..................… ...
Page 6
... TGF4124-EPU Linear Model Vds = 8 V and Ids = 1. FET Elements Lg = .00103 0.53233 Rgs = 4086 Ri = 0.030 Cgs = 26.9096 pF Cdg = 0.99024 pF Rdg = 102026 0.04943 Ls = 0.00808 nH Rds = 5.39715 Cds = 4.30372 0.19448 Ld = 0.00965 nH VCCS Parameters M = 2.668 1E19 R2 = 1E19 4.50 pS Freq-GHz MAG-S11 ANG-S11 MAG-S21 ANG-S21 MAG-S12 ANG-S12 MAG-S22 ANG-S22 ...
Page 7
... Thermal Model of TGF4124-EPU Predicted Channel Temperature vs Base Plate Temperature With a .020" CM15 (15/85 Copper Molybdenum) carrier plate solder attached using 0.0015" AuSn (80/20) solder 250 240 230 220 210 200 190 180 170 160 150 140 130 120 110 100 90 80 ...
Page 8
... Drain pad sizes are 4.7 x 14.5 (0.12 x 0.37) A minimum of four gate bonds and eight drain bonds is recommended for operation. Sources are connected to backside metalization. Alternate gate and drain pads are located on either end of the FET for paralleling TGF4124-EPUs. TriQuint Semiconductor Texas Phone: 972 994-8465 7.4 28.1 36.0 (0 ...
Page 9
... Application circuit for the TGF4124-EPU at 2.3 GHz The FET is soldered using AuSn solder at 300 C for 30 secs. Input and output matching networks are 0.381 mm ZrSn Tioxide substrates (Er = 38). The design load impedance is between 3 the 8 pF output capacitance of the FETincluded in the output network. For further explanation refer to the application note “ ...