LTC4253AIGN#TR Linear Technology, LTC4253AIGN#TR Datasheet
LTC4253AIGN#TR
Specifications of LTC4253AIGN#TR
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LTC4253AIGN#TR Summary of contents
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... Central Office Switching ■ High Availability Servers ■ Disk Arrays , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. U TYPICAL APPLICATIO – 48V/2.5A Hot Swap Controller – ...
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LTC4253/LTC4253A ABSOLUTE AXI U RATI GS (Note 1), All voltages referred Current into V (100µs Pulse) ........................... 100mA IN Current into DRAIN (100µs Pulse) ........................ 20mA V , DRAIN Minimum Voltage............................... – 0.3V IN ...
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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER R SS Output Impedance SS V Analog Current Limit Offset Voltage Ratio ( Voltage ACL OS ACL ...
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LTC4253/LTC4253A ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER I SQTIMER Pin Current SQTMR V DRAIN Pin Voltage Low Threshold DRNL I DRAIN Leakage Current DRNL V DRAIN Pin Clamp Voltage DRNCL V PWRGD1, PWRGD2, PWRGD3 PGL ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS 180 I = 2mA 25°C 160 A 140 120 100 ...
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LTC4253/LTC4253A W U TYPICAL PERFOR A CE CHARACTERISTICS V vs Temperature GATEH 3.6 UV/ – V 3.4 GATEH IN GATE I = 2mA IN 3.2 3.0 2.8 2.6 2.4 2.2 2.0 –55 –35 –15 5 ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS ∆I /∆I vs Temperature TMRACC DRN 9 2mA IN 8.8 8.6 8.4 8.2 8.0 7.8 7.6 7.4 7.2 7.0 –55 –35 – 105 125 TEMPERATURE (°C) ...
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LTC4253/LTC4253A CTIO S EN2 (Pin 1): Power Good Status Output Two Enable. This is a TTL compatible input that is used to control PWRGD2 and PWRGD3 outputs. When EN2 is driven low, both PWRGD2 and ...
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CTIO S During GATE start-up, a second comparator detects GATE within 2. before PWRGD1 can be set and power IN good sequencing starts. DRAIN (Pin 10): Drain Sense Input. Connecting an exter- nal ...
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LTC4253/LTC4253A W BLOCK DIAGRA 50µA PWRGD1 EN2 120µA 50µ PWRGD2 2 SQTIMER V EE EN3 120µA 50µ PWRGD3 16 SQTIMER V EE ...
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U OPERATIO Hot Circuit Insertion When circuit boards are inserted into a live backplane, the supply bypass capacitors can draw huge transient cur- rents from the power bus as they charge. The flow of current damages the connector pins and ...
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LTC4253/LTC4253A U OPERATIO Interlock Conditions A start-up sequence commences once these “interlock” conditions are met: 1. The input voltage V exceeds The voltage at UV > UVHI UV 3. The voltage at OV < V ...
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U OPERATIO Higher overloads are handled by an analog current limit loop. If the drop across R reaches V S limiting loop servos the MOSFET gate and maintains a constant output current current limit mode, ...
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LTC4253/LTC4253A U U APPLICATIO S I FOR ATIO SHUNT REGULATOR A fast responding regulator shunts the LTC4253/LTC4253A V pin. Power is derived from – 48RTN by an external IN current limiting resistor. The shunt regulator clamps V to 13V (V ...
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U U APPLICATIO S I FOR ATIO The resistive divider values shown set a standing current of slightly more than 100µA and define an impedance at UV/OV of 30kΩ. In most applications, 30kΩ impedance coupled with 300mV UV hysteresis make ...
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LTC4253/LTC4253A U U APPLICATIO S I FOR ATIO TIMER The operation of the TIMER pin is somewhat complex as it handles several key functions. A capacitor C TIMER to provide timing for the LTC4253/LTC4253A. Four different charging and discharging modes ...
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U U APPLICATIO S I FOR ATIO POWER GOOD SEQUENCING After the initial TIMER cycle, GATE ramps up to turn on the external MOSFET which in turn pulls DRAIN low. When GATE is within 2. and DRAIN is ...
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LTC4253/LTC4253A U U APPLICATIO S I FOR ATIO SENSE The SENSE pin is monitored by the circuit breaker (CB) comparator, the analog current limit (ACL) amplifier, and the fast current limit (FCL) comparator. Each of these three measures the potential ...
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U U APPLICATIO S I FOR ATIO MOSFET SELECTION The external MOSFET switch must have adequate safe operating area (SOA) to handle short-circuit conditions until TIMER times out. These considerations take prece- dence over DC current ratings. A MOSFET with ...
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LTC4253/LTC4253A U U APPLICATIO S I FOR ATIO Computing the maximum soft-start capacitor value during soft-start to a load short is complicated by the nonlinear MOSFET’s SOA characteristics and the R An overconservative but simple approach begins with the maximum ...
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U U APPLICATIO S I FOR ATIO SENSE RESISTOR CONSIDERATIONS For proper circuit breaker operation, Kelvin-sense PCB connections between the sense resistor and the LTC4253/ LTC4253A’s V and SENSE pins are strongly recom- EE mended. The drawing in Figure 7 ...
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LTC4253/LTC4253A U U APPLICATIO S I FOR ATIO V CLEARS V IN LKO RESET < 0.8V, GATE < GND – (–48RTN) – (–48V) UV/ LKO TIMER GATE V GATEL SS SENSE ...
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U U APPLICATIO S I FOR ATIO Live Insertion with Short Pin Control of UV/OV In the example shown in Figure 9, power is delivered through long connector pins whereas the UV/OV divider makes contact through a short pin. This ...
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LTC4253/LTC4253A U U APPLICATIO S I FOR ATIO V (V for the LTC4253A). In addition, the internal logic UVHI UV checks for OV < for the LTC4253A), RESET < OVHI OV 0.8V, GATE < SENSE < ...
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U U APPLICATIO S I FOR ATIO UV DROPS BELOW V (V – V UVLO UV UV CLEARS V (V UVHI UVHI V UVLO 5µA TIMER GATE V GATEL SS SENSE DRAIN PWRGD1 PWRGD2 PWRGD3 SQTIMER ...
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LTC4253/LTC4253A U U APPLICATIO S I FOR ATIO OV OVERSHOOTS V OVHI OV DROPS BELOW OVHI V OVLO V TMRH 200µ • I TIMER GATE 50µA V GATEL 20 • ...
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U U APPLICATIO S I FOR ATIO Resetting a Fault Latch A latched circuit breaker fault of the LTC4253/LTC4253A has the benefit of a long cooling time. The latched fault can be reset by pulsing the RESET pin high until ...
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LTC4253/LTC4253A U U APPLICATIO S I FOR ATIO 425353afc ...
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U U APPLICATIO S I FOR ATIO TMRH 200µ • I DRN TIMER GATE SS V ACL SENSE OUT DRAIN PWRGD1 (14a) Analog Current Limit Fault Figure 14. Current Limit Behavior ...
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LTC4253/LTC4253A U U APPLICATIO S I FOR ATIO Power Limit Circuit Breaker Figure 16 shows the LTC4253A in a power limit circuit breaking application. The SENSE pin is modulated by board voltage V . The zener voltage, V SUPPLY to ...
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... FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... Drain Accelerated Response, 1% Accurate UV/OV Thresholds www.linear.com ● 100µF POWER MODULE 1 C3 POWER 0.1µF MODULE † V OUT † FMMT493 Q1 IRF530S R S 0.02Ω LT 0506 REV C • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2002 POWER MODULE 3 EN 4253 F18 425353afc ...