LTC4253AIGN#TR Linear Technology, LTC4253AIGN#TR Datasheet - Page 16

• Manufacturer Part Number: LTC4253AIGN#TR
• Description: MS-Hot Swap/High Voltage, Neg. 48V Hot Swap With 1% UV, Sequencer
• Manufacturer: Linear Technology

Specifications of LTC4253AIGN#TR

• Family Name: LTC4253A
• Package Type: SSOP N
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 3.99mm
• Product Height (mm): 1.5mm
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / Rohs Status: Not Compliant

APPLICATIO S I FOR ATIO
LTC4253/LTC4253A
TIMER
The operation of the TIMER pin is somewhat complex as
it handles several key functions. A capacitor C
TIMER to provide timing for the LTC4253/LTC4253A. Four
different charging and discharging modes are available at
TIMER:
1. 5µA slow charge; initial timing delay.
2. (200µA + 8 • I
3. 5µA slow discharge; circuit breaker “cool-off.”
4. Low impedance switch; resets the TIMER capacitor
For initial timing delay, the 5µA pull-up is used. The low
impedance switch is turned off and the 5µA current source
is enabled when the interlock conditions are met. C
charges to 4V in a time period given by:
When C
turns on and discharges C
and both SS and GATE outputs are released.
CIRCUIT BREAKER TIMER OPERATION
If the SENSE pin detects more than 50mV drop across R
the TIMER pin charges C
charges to 4V, the GATE pin pulls low and the LTC4253/
LTC4253A latch off. The LTC4253/LTC4253A remain
latched off until the RESET pin is momentarily pulsed high,
the UV pin is momentarily pulsed low, the TIMER pin is
momentarily discharged low by an external switch or V
dips below UVLO and is then restored. The circuit breaker
timeout period is given by:
16
after an initial timing delay, in UVLO, in UV and in OV
during initial timing and when RESET is high.
t
t
=
=
4
200
T
V C
5
reaches V
µ
•
µ +
A
4
A
V C
T
•
8
DRN
T
•
TMRH
I
U
DRN
) fast charge; circuit breaker delay.
( 4V), the low impedance switch
T
T
U
. A GATE start-up cycle begins
with (200µA + 8 • I
W
T
DRN
U
is used at
). If C
(2)
(3)
S
IN
T
T
,
If V
current and this makes I
above V
charging of C
Intermittent overloads may exceed the 50mV threshold at
SENSE but, if their duration is sufficiently short, TIMER
will not reach 4V and the LTC4253/LTC4253A will not shut
the external MOSFET off. To handle this situation, the
TIMER discharges C
ever the SENSE voltage is less than 50mV. Therefore, any
intermittent overload with V
duty cycle of more than 2.5% will eventually trip the circuit
breaker and shut down the LTC4253/LTC4253A. Figure 4
shows the circuit breaker response time in seconds nor-
malized to 1µF. The asymmetric charging and discharging
of C
The normalized circuit response time is estimated by:
OUT
C
T
T
is a fair gauge of MOSFET heating.
(
t
µ
< 5V, an internal PMOS isolates DRAIN pin leakage
DRNCL
F
)
0.01
0.1
Figure 4. Circuit Breaker Response Time
10
=
1
0
T
[
(
during the circuit breaker fault period, the
is accelerated by 8 • I
205 8
20
+
FAULT DUTY CYCLE, D (%)
T
C
slowly with a 5µA pull-down when-
T
(µF)
t
•
DRN
I
40
4
DRN
=
(205 + 8 • I
= 0 in Equation (3). If V
OUT
)
•
60
D
< 5V and an aggregate
4
DRN
−
I
5
DRN
) • D – 5
DRN
80
]
= 0µA
for D
4253 F04
of Equation (1).
100
>
2 5
. %
425353afc
OUT
(4)
is