LTC4253AIGN-ADJ Linear Technology, LTC4253AIGN-ADJ Datasheet - Page 21

• Manufacturer Part Number: LTC4253AIGN-ADJ
• Description: IC,Power Control/Management,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Linear Technology

Specifications of LTC4253AIGN-ADJ

• Family Name: LTC4253A-ADJ
• Package Type: SSOP N
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 3.99mm
• Product Height (mm): 1.5mm
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / Rohs Status: Not Compliant

APPLICATIO S I FOR ATIO
Actual board evaluation showed that C
appropriate. The ratio (R
gauge as large ratios may result in the time-out period
expiring prematurely. This gauge is determined empiri-
cally with board level evaluation.
SUMMARY OF DESIGN FLOW
To summarize the design flow, consider the application
shown in Figure 1. It was designed for 80W and C
Calculate maximum load current: 80W/43V = 1.86A;
allowing for 83% converter efficiency, I
Calculate R
Calculate I
I
Select a MOSFET that can handle 3.3A at 71V: IRF530S.
Calculate C
C
period t
Consult MOSFET SOA curves: the IRF530S can handle
3.3A at 100V for 8.3ms, so it is safe to use in this
application.
Calculate C
FREQUENCY COMPENSATION
The LTC4253A-ADJ typical frequency compensation net-
work for the analog current limit loop is a series R
and C
relationship between the compensation capacitor C
the MOSFET’s C
starting value for C
specification. Optimized values for C
several popular MOSFETs. Differences in the optimized
value of C
less, compensation values should be verified by board
level short-circuit testing.
As seen in Figure 5, at the onset of a short-circuit event, the
input supply voltage can ring dramatically due to series
inductance. If this voltage avalanches the MOSFET, cur-
rent continues to flow through the MOSFET to the output.
SHORTCIRCUIT(MAX)
T
= 680nF, which gives the circuit breaker time-out
C
connected from GATE to V
MAX
C
SS
S
versus the starting value are small. Neverthe-
T
= 5.9ms.
: from Equation 9 R
SHORT-CIRCUIT(MAX)
: using Equations 15 and 16 select C
: from Equation 14 C
ISS
. The line in Figure 6 is used to select a
U
= 3.3A.
C
based upon the MOSFET’s C
SS
U
• C
SS
) to t
S
: from Equation 11
EE
= 20mΩ.
W
. Figure 6 depicts the
CL(CHARGE)
T
C
= 383nF. Select
IN(MAX)
SS
are shown for
= 100nF was
L
SS
U
= 2.2A.
is a good
= 100µF.
C
= 33nF.
(10Ω)
C
and
ISS
The analog current limit loop cannot control this current
flow and therefore the loop undershoots. This effect
cannot be eliminated by frequency compensation. A zener
diode is required to clamp the input supply voltage and
prevent MOSFET avalanche.
SENSE RESISTOR CONSIDERATIONS
For proper circuit breaker operation, Kelvin-sense PCB
connections between the sense resistor and the LTC4253A-
ADJ’s V
The drawing in Figure 7 illustrates the correct way of
making connections between the LTC4253A-ADJ and the
sense resistor. PCB layout should be balanced and sym-
metrical to minimize wiring errors. In addition, the PCB
layout for the sense resistor should include good thermal
management techniques for optimal sense resistor power
dissipation.
TRACK WIDTH W:
ON 1 OZ COPPER
0.03" PER AMP
Figure 7. Making PCB Connections to the Sense Resistor
EE
50
45
40
35
30
25
20
15
10
and SENSE pins are strongly recommended.
CURRENT FLOW
5
0
Figure 6. Recommended Compensation
Capacitor C
FROM LOAD
0
IRF530S
IRF540S
W
IRF740
2000
C
MOSFET C
vs MOSFET C
SENSE
IRF3710
SENSE RESISTOR
LTC4253A-ADJ
TO
4000
ISS
NTY100N10
(pF)
6000
ISS
V
TO
EE
4253A F06
TO –48V BACKPLANE
8000
CURRENT FLOW
21
4253a-adjf
4253A F07