LAN91C96TQFP SMSC, LAN91C96TQFP Datasheet - Page 86

• Manufacturer Part Number: LAN91C96TQFP
• Description: Ethernet ICs Non-PCI 10 Mbps Ethernet MAC
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN91C96TQFP

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 Mbps, 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Supply Current (max): 95 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.10
9.11
9.12
9.13
9.13.1 Manchester Encoding
9.13.2 Transmit Drivers
Revision 1.0 (10-24-08)
10Base-T
The 10BASE-T interface conforms to the twisted pair MAU addendum to the 802.3 specification. On the
transmission side, it converts the NRZ data from the controller to Manchester data and provides the
appropriate signal level for driving the media. Signal are predistorted before transmission to minimize ISI.
The collision detection circuitry monitors the simultaneous occurrence of received signals and transmitted
data on the media. During transmission, data is automatically looped back to the receiver except during
collision periods, in which case the input to the receiver is network data. During collisions, should the
receive input go idle prior to the transmitter going idle, input to the receiver switches back to the transmitter
within nine bit times. Following transmission, the transmitter performs a SQE test. This test exercises the
collision detection circuitry within the 10BASE-T interface.
The receiver monitors the media at all times. It recovers the clock and data and passes it along to the
controller. In the absence of any receive activity, the transmitter is looped back to the receiver. In addition,
the receiver performs automatic polarity correction. The 10BASE-T interface performs link integrity tests
per section 14.2.1.7 of 802.3, using the following values:
1.
2.
3.
4.
The state of the link is reflected in the EPHSR.
AUI
The LAN91C96 also provides a standard six wire AUI interface to a coax transceiver.
Physical Interface
The internal physical interface (PHY) consists of an encoder/decoder (ENDEC) and an internal 10BASE-T
transceiver. The ENDEC also provides a standard 6-pin AUI interface to an external coax transceiver for
10BASE-2 and 10BASE-5 applications. The internal signals between MAC and the PHY can be routed to
pins by asserting the nXENDEC pin low. This feature allows the interface to an external ENDEC and
transceiver. The PHY functions can be divided into transmit and receive functions.
Transmit Functions
The PHY encodes the transmit data received from the MAC. The encoded data is directed internally to the
selected output driver for transmission over the twisted-pair network or the AUI cable. Data transmission
and encoding is initiated by the Transmit Enable input, TXE, going low.
The encoded transmit data passes through to the transmit driver pair, TPETXP(N), and its complement,
TPETXDP(N). Each output of the transmit driver pair has a source resistance of 10 ohms maximum and a
current rating of 25 mA maximum. The degree of predistortion is determined by the termination resistors;
the equivalent resistance should be 100 ohms.
Link_loss_timer: 64 ms
Link_test_min_timer: 4 ms
Link_count: 2
Link_test_max_timer: 64 ms
DATASHEET
Page 86
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
SMSC LAN91C96 5v&3v
Datasheet