AD7538JRZ Analog Devices Inc, AD7538JRZ Datasheet - Page 13

• Manufacturer Part Number: AD7538JRZ
• Description: DAC 1-CH R-2R 14-Bit 24-Pin SOIC W
• Manufacturer: Analog Devices Inc

Specifications of AD7538JRZ

• Package: 24SOIC W
• Resolution: 14 Bit
• Conversion Rate: 667 KSPS
• Architecture: R-2R
• Digital Interface Type: Parallel
• Number Of Outputs Per Chip: 1
• Output Type: Current
• Full Scale Error: ±8 LSB
• Integral Nonlinearity Error: ±2 LSB
• Maximum Settling Time: 1.5 us
• Settling Time: 1.5µs
• Number Of Bits: 14
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 1W
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Number Of Channels: 1
• Interface Type: Parallel
• Single Supply Voltage (typ): 12/15V
• Dual Supply Voltage (typ): Not RequiredV
• Power Supply Requirement: Single
• Single Supply Voltage (min): 11.4V
• Single Supply Voltage (max): 15.75V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 24
• Package Type: SOIC W
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATION HINTS
OUTPUT OFFSET
CMOS DACs in circuits such as Figure 6 and Figure 8 exhibit
a code dependent output resistance, which in turn can cause a
code dependent error voltage at the output of the amplifier.
The maximum amplitude of this error, which adds to the DAC
nonlinearity, depends on V
offset voltage. To maintain specified accuracy with V
it is recommended that V
10
a suitable op amp. The op amp has a wide bandwidth and high
slew rate and is recommended for ac and other applications
requiring fast settling.
GENERAL GROUND MANAGEMENT
Because the AD7538 is specified for high accuracy, it is impor-
tant to use a proper grounding technique. AC or transient
voltages between AGND and DGND can cause noise injection
into the analog output. The simplest method of ensuring that
voltages at AGND and DGND are equal is to tie AGND and
DGND together at the AD7538. In more complex systems
where the AGND and DGND intertie on the backplane, it is
recommended that two diodes be connected in inverse
parallel between the AD7538 AGND and DGND pins
(1N914 or equivalent).
MICROPROCESSOR INTERFACING
The AD7538 is designed for easy interfacing to 16-bit micro-
processors and can be treated as a memory mapped peripheral.
This reduces the amount of external logic needed for interfacing
to a minimal.
AD7538-TO-8086 INTERFACE
Figure 10 shows the 8086 processor interface to a single device.
In this setup, the double buffering feature (using LDAC ) of the
DAC is not used. The 14-bit word is written to the DAC in one
MOVE instruction and the analog output responds
immediately.
AD0 TO AD15
−6
) (V
8096
REF
ALE
WR
), over the temperature range of operation. The
1
Figure 10. AD7538-to-8086 Interface Circuit
LINEAR CIRCUITRY OMITTED FOR CLARITY.
LATCH
16-BIT
OS
OS
DATA BUS
be no greater than 0.25 mV, or (25 ×
, where V
ADDRESS BUS
ADDRESS
DECODE
OS
is the amplifier input
AD13
AD0
CS
LDAC
WR
DB0 TO DB13
AD7538
REF
AD711
at 10 V,
1
Rev. B | Page 13 of 16
is
In a multiple DAC system, the double buffering of the AD7538
allows the user to simultaneously update all DACs. In Figure 11,
a 14-bit word is loaded to the input registers of each of the DACs
in sequence. Then, with one instruction to the appropriate
address, CS4 (that is, LDAC ) is brought low, updating all the
DACs simultaneously.
AD7538-TO-MC68000 INTERFACE
Figure 12 shows the MC68000 processor interface to a single
device. In this setup, the double buffering feature of the DAC
is not used and the appropriate data is written into the DAC in
one MOVE instruction.
AD0 TO AD15
MC68000
A1 TO A23
D0 TO D15
8096
1
LINEAR CIRCUITRY OMITTED FOR CLARITY.
DTACK
Figure 11. AD7538-to-8086 Interface: Multiple DAC System
ALE
R/W
WR
AS
1
LINEAR CIRCUITRY OMITTED FOR CLARITY.
Figure 12. AD7538-to-MC68000 Interface
LATCH
16-BIT
ADDRESS
DECODE
DATA BUS
DATA BUS
ADDRESS BUS
ADDRESS
CS4 CS3 CS2
DECODE
ADDRESS BUS
CS1
CS
LDAC
WR
DB0 TO DB13
CS
LDAC
WR
DB0 TO DB13
CS
LDAC
WR
DB0 TO DB13
CS
LDAC
WR
DB0 TO DB13
AD7538
AD7538
AD7538
AD7538
AD7538
1
1
1
1