AD7538JRZ Analog Devices Inc, AD7538JRZ Datasheet - Page 7

• Manufacturer Part Number: AD7538JRZ
• Description: DAC 1-CH R-2R 14-Bit 24-Pin SOIC W
• Manufacturer: Analog Devices Inc

Specifications of AD7538JRZ

• Package: 24SOIC W
• Resolution: 14 Bit
• Conversion Rate: 667 KSPS
• Architecture: R-2R
• Digital Interface Type: Parallel
• Number Of Outputs Per Chip: 1
• Output Type: Current
• Full Scale Error: ±8 LSB
• Integral Nonlinearity Error: ±2 LSB
• Maximum Settling Time: 1.5 us
• Settling Time: 1.5µs
• Number Of Bits: 14
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 1W
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Number Of Channels: 1
• Interface Type: Parallel
• Single Supply Voltage (typ): 12/15V
• Dual Supply Voltage (typ): Not RequiredV
• Power Supply Requirement: Single
• Single Supply Voltage (min): 11.4V
• Single Supply Voltage (max): 15.75V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 24
• Package Type: SOIC W
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Description
Pin No.
1
2
3
4
5
6 to 19
20
21
22
23
24
1
X = don’t care.
Mnemonic
V
R
I
AGND
DGND
DB13 to DB0
LDAC
CS
WR
V
V
OUT
REF
FB
DD
SS
Description
Voltage Reference.
Feedback Resistor. Used to close the loop around an external op amp.
Current Output Terminal.
Analog Ground
Digital Ground.
Data Inputs. Bit DB13 (MSB) to Bit DB0 (LSB).
Chip Select Input. Active low.
Asynchronous Load DAC Input. Active low.
Write Input. Active low.
CS
0
1
0
1
X
+12 V to +15 V Supply Input.
Bias pin for high temperature low leakage configuration. To implement low leakage system, the pin should be
at a negative voltage. See Figure 6 and Figure 8 for recommended circuitry.
1
X
LDAC
1
0
0
1
1
(MSB) DB13
AGND
DGND
DB12
DB10
DB11
V
I
DB9
DB8
DB7
R
OUT
REF
Figure 3. Pin Configuration
FB
Rev. B | Page 7 of 16
10
11
12
1
2
3
4
5
6
7
8
9
WR
0
X
0
X
1
1
1
(Not to Scale)
AD7538
TOP VIEW
24
23
22
20
19
18
17
16
15
14
13
21
V
V
WR
CS
LDAC
DB0 (LSB)
DB1
DB2
DB3
DB4
DB5
DB6
SS
DD
Operation
Load input register.
Load DAC register from input register.
Input and DAC registers are transparent.
No operation.
No operation.
AD7538