74LVC1G07GW-G NXP Semiconductors, 74LVC1G07GW-G Datasheet - Page 13

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74LVC1G07GW-G

Manufacturer Part Number
74LVC1G07GW-G
Description
Buffer/Driver 1-CH Non-Inverting Open Drain CMOS 5-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC1G07GW-G

Package
5TSSOP
Logic Family
LVC
Logic Function
Buffer/Driver
Number Of Outputs Per Chip
1
Output Type
Open Drain
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
2.3(Typ)@2.7V|2.2(Typ)@3.3V|1.6(Typ)@5V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting
NXP Semiconductors
Fig 14. Package outline SOT1202 (XSON6)
74LVC1G07
Product data sheet
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1202
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
0.20
0.15
0.12
b
IEC
terminal 1
index area
1.05
1.00
0.95
e
D
(6×)
L
(2)
1.05
1.00
0.95
1
E
0.55 0.35
JEDEC
e
1
6
All information provided in this document is subject to legal disclaimers.
e
e
1
1
References
D
2
5
0.35
0.30
0.27
Rev. 9 — 24 August 2010
0
L
e
1
0.40
0.35
0.32
L
1
b
3
4
JEITA
scale
0.5
A
E
L
1
A
1 mm
(4×)
(2)
Buffer with open-drain output
European
projection
74LVC1G07
© NXP B.V. 2010. All rights reserved.
Issue date
10-04-02
10-04-06
sot1202_po
SOT1202
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