74LVC1G07GW-G NXP Semiconductors, 74LVC1G07GW-G Datasheet - Page 3

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74LVC1G07GW-G

Manufacturer Part Number
74LVC1G07GW-G
Description
Buffer/Driver 1-CH Non-Inverting Open Drain CMOS 5-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC1G07GW-G

Package
5TSSOP
Logic Family
LVC
Logic Function
Buffer/Driver
Number Of Outputs Per Chip
1
Output Type
Open Drain
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
2.3(Typ)@2.7V|2.2(Typ)@3.3V|1.6(Typ)@5V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting
NXP Semiconductors
6. Pinning information
Table 3.
7. Functional description
Table 4.
[1]
74LVC1G07
Product data sheet
Symbol
n.c.
A
GND
Y
n.c.
V
Input A
L
H
Fig 4.
CC
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
GND
n.c.
A
Pin configuration
SOT353-1 and SOT753
Pin description
Function table
1
2
3
Pin
SOT353-1, SOT753 SOT886, SOT891, SOT1115 and SOT1202
1
2
3
4
-
5
74LVC1G07
6.1 Pinning
6.2 Pin description
001aab622
[1]
5
4
V
Y
CC
1
2
3
4
5
6
All information provided in this document is subject to legal disclaimers.
Fig 5.
GND
Rev. 9 — 24 August 2010
n.c.
Pin configuration SOT886
A
Transparent top view
74LVC1G07
1
2
3
Output Y
L
Z
001aab623
6
5
4
V
n.c.
Y
CC
Description
not connected
data input
ground (0 V)
data output
not connected
supply voltage
Fig 6.
Buffer with open-drain output
GND
n.c.
Pin configuration SOT891,
SOT1115 and SOT1202
A
Transparent top view
74LVC1G07
74LVC1G07
1
2
3
© NXP B.V. 2010. All rights reserved.
001aag422
6
5
4
V
n.c.
Y
CC
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