M4-128N/64-15JC LATTICE SEMICONDUCTOR, M4-128N/64-15JC Datasheet - Page 35

• Manufacturer Part Number: M4-128N/64-15JC
• Description: CPLD MACH 4 Family 5K Gates 128 Macro Cells 41.7MHz/55.6MHz EECMOS Technology 5V 84-Pin PLCC Tube
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of M4-128N/64-15JC

• Package: 84PLCC
• Family Name: MACH 4
• Device System Gates: 5000
• Number Of Macro Cells: 128
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 64
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 41.7|55.6 MHz
• Number Of Product Terms Per Macro: 20
• Re-programmability Support: Yes
• Operating Temperature: 0 to 70 °C

BLOCK DIAGRAM – M4(LV)-256/128
Block C I/O16–I/O23
Block D I/O24–I/O31
Block E I/O32–I/O39
Block F I/O40–I/O47
16
16
16
16
24
24
24
24
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O48–I/O55
I/O8–I/O15
I/O Cells
I/O Cells
Matrix
I/O Cells
Matrix
I/O Cells
Matrix
68 X 90
Matrix
68 X 90
Block B
68 X 90
68 X 90
Block G
16
16
16
16
8
8
8
8
8
34
8
34
34
16
16
8
34
16
16
8
8
8
8
8
4
4
4
4
4
4
4
4
4
4
4
4
16
16
16
16
24
24
24
24
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O56–I/O63
I/O0–I/O7
I/O Cells
I/O Cells
I/O Cells
I/O Cells
Matrix
Matrix
Matrix
68 X 90
68 X 90
Matrix
68 X 90
68 X 90
Block A
Block H
16
16
16
16
8
8
8
8
8
34
8
34
34
16
16
8
34
16
16
8
8
8
8
8
4
4
4
4
4
4
4
4
MACH 4 Family
4
4
4
4
CLK0–CLK3
4
I0–I13
14
4
4
4
4
4
4
4
4
4
4
4
4
4
8
8
8
8
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
I/O120–I/O127
I/O64–I/O71
Output Switch
Output Switch
Output Switch
Output Switch
Macrocells
I/O Cells
Macrocells
I/O Cells
I/O Cells
Block P
68 X 90
68 X 90
Macrocells
I/O Cells
68 X 90
68 X 90
Macrocells
Block I
16
16
34
34
16
16
16
16
34
34
16
16
Matrix
8
Matrix
8
8
Matrix
8
Matrix
8
8
8
8
16
16
16
16
24
24
24
24
16
16
16
16
4
4
4
4
4
4
4
4
4
4
4
4
8
8
8
8
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
I/O112–I/O119
I/O72–I/O79
Output Switch
Output Switch
Output Switch
Output Switch
I/O Cells
Macrocells
I/O Cells
Macrocells
I/O Cells
Macrocells
I/O Cells
Block O
Macrocells
68 X 90
68 X 90
68 X 90
68 X 90
Block J
16
16
34
34
16
16
16
16
34
34
16
16
8
Matrix
8
8
8
Matrix
Matrix
Matrix
8
8
8
8
16
16
16
16
24
24
24
24
16
16
16
16
I/O104–I/O111 Block N
I/O96–I/O103 Block M
I/O88–I/O95 Block L
I/O80–I/O87 Block K
17466G-024
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