XC3S250E-4VQG100I Xilinx Inc, XC3S250E-4VQG100I Datasheet - Page 148

FPGA Spartan®-3E Family 250K Gates 5508 Cells 572MHz 90nm (CMOS) Technology 1.2V 100-Pin VTQFP

XC3S250E-4VQG100I

Manufacturer Part Number
XC3S250E-4VQG100I
Description
FPGA Spartan®-3E Family 250K Gates 5508 Cells 572MHz 90nm (CMOS) Technology 1.2V 100-Pin VTQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S250E-4VQG100I

Package
100VTQFP
Family Name
Spartan®-3E
Device Logic Cells
5508
Device Logic Units
612
Device System Gates
250000
Number Of Registers
4896
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
66
Ram Bits
221184
Package / Case
100-TQFP, 100-VQFP
Mounting Type
Surface Mount
Voltage - Supply
1.1 V ~ 3.465 V
Operating Temperature
-40°C ~ 100°C
Number Of I /o
66
Number Of Logic Elements/cells
*
Number Of Gates
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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DC and Switching Characteristics
Table 109: Switching Characteristics for the PS in Variable Phase Mode (Continued)
Notes:
1.
2.
3.
148
The numbers in this table are based on the operating conditions set forth in
The maximum variable phase shift range, MAX_STEPS, is only valid when the DCM is has no initial fixed phase shifting, i.e., the PHASE_SHIFT
attribute is set to 0.
The DCM_DELAY_STEP values are provided at the bottom of
Symbol
Description
www.xilinx.com
Table
105.
Table 77
and
Table
108.
Equation
DS312-3 (v3.8) August 26, 2009
Product Specification
Units
R

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