AD7495BRZ Analog Devices Inc, AD7495BRZ Datasheet - Page 13

• Manufacturer Part Number: AD7495BRZ
• Description: ADC Single SAR 1MSPS 12-Bit Serial 8-Pin SOIC N
• Manufacturer: Analog Devices Inc

Specifications of AD7495BRZ

• Package: 8SOIC N
• Resolution: 12 Bit
• Sampling Rate: 1000 KSPS
• Architecture: SAR
• Number Of Analog Inputs: 1
• Digital Interface Type: Serial (SPI, QSPI, Microwire)
• Input Type: Voltage
• Signal To Noise Ratio: 68 dB
• Polarity Of Input Voltage: Unipolar
• Number Of Bits: 12
• Sampling Rate (per Second): 1M
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 10.5mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

THEORY OF OPERATION
The AD7475/AD7495 are fast, micropower, 12-bit, single-
supply analog-to-digital converters (ADCs). The parts can be
operated from a 2.7 V to 5.25 V supply. When operated from
either a 5 V supply or a 3 V supply, the AD7475/AD7495 are
capable of throughput rates of 1 MSPS when provided with a
20 MHz clock.
The AD7475/AD7495 ADCs have an on-chip track-and-hold
with a serial interface housed in either an 8-lead SOIC_N or
MINI_SO package, features that offer the user considerable
space-saving advantages over alternative solutions. The AD7495
also has an on-chip 2.5 V reference. The serial clock input
accesses data from the part but also provides the clock source
for the successive-approximation ADC. The analog input range
is 0 V to REF IN for the AD7475 and 0 V to REF OUT for the
AD7495.
The AD7475/AD7495 also feature power-down options to allow
power saving between conversions. The power-down feature is
implemented across the standard serial interface, as described
in the Operating Modes section.
CONVERTER OPERATION
The AD7475/AD7495 are 12-bit, successive approximation
analog-to-digital converters based around a capacitive DAC.
The AD7475/AD7495 can convert analog input signals in the
range 0 V to 2.5 V. Figure 10 and Figure 12 show simplified
schematics of the ADC. The ADC comprises control logic, SAR,
and a capacitive DAC, which are used to add and subtract fixed
amounts of charge from the sampling capacitor to bring the
comparator back into a balanced condition. Figure 10 shows the
ADC during its acquisition phase. SW2 is closed and SW1 is in
Position A. The comparator is held in a balanced condition and
the sampling capacitor acquires the signal on V
AGND
V
IN
SW1
A
B
Figure 10. ADC Acquisition Phase
4k Ω
SW2
COMPARATOR
CONTROL LOGIC
CAPACITIVE
IN
DAC
.
Rev. B | Page 13 of 24
When the ADC starts a conversion (see Figure 11), SW2 opens
and SW1 moves to Position B causing the comparator to
become unbalanced. The control logic and the capacitive DAC
are used to add and subtract fixed amounts of charge from the
sampling capacitor to bring the comparator back into a
balanced condition. When the comparator is rebalanced, the
conversion is complete. The control logic generates the ADC
output code.
ADC TRANSFER FUNCTION
The output coding of the AD7475/AD7495 is straight binary.
The designed code transitions occur midway between
successive LSB integer values (that is, ½ LSB,
LSB size is = V
AD7475/AD7495 is shown in Figure 12.
AGND
V
IN
SW1
A
Figure 12. AD7475/AD7495 Transfer Characteristic
111...111
111...110
111...000
011...111
000...010
000...001
000...000
REF
B
/4096. The ideal transfer characteristic for the
Figure 11. ADC Conversion Phase
0V 0.5LSB
4k Ω
SW2
ANALOG INPUT
COMPARATOR
1LSB = V
V
REF
–1.5LSB
AD7475/AD7495
REF
CONTROL LOGIC
/4096
3
/
CAPACITIVE
2
LSBs, etc.). The
DAC