PIC16F1507-E/SS Microchip Technology, PIC16F1507-E/SS Datasheet - Page 5

• Manufacturer Part Number: PIC16F1507-E/SS
• Description: 3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F1507-E/SS

• Processor Series: PIC16
• Core: PIC16F
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 3.5 KB
• Data Ram Size: 128 B
• Interface Type: ICSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 3
• Operating Supply Voltage: 2.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-20
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 125 C
• Supply Current (max): 30 uA
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: -
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: -
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

INTRODUCTION
DOCUMENT LAYOUT
 2011 Microchip Technology Inc.
All documentation becomes dated, and this manual is no exception. Microchip tools and
documentation are constantly evolving to meet customer needs, so some actual dialogs
and/or tool descriptions may differ from those in this document. Please refer to our web site
(www.microchip.com) to obtain the latest documentation available.
Documents are identified with a “DS” number. This number is located on the bottom of each
page, in front of the page number. The numbering convention for the DS number is
“DSXXXXXA”, where “XXXXX” is the document number and “A” is the revision level of the
document.
For the most up-to-date information on development tools, see the MPLAB
Select the Help menu, and then Topics to open a list of available online help files.
This chapter contains general information that will be useful to know before using the
Configurable Logic Cell (CLC) Configuration Tool. Items discussed in this chapter
include:
• Document Layout
• Conventions Used in this Guide
• The Microchip Web Site
• Customer Support
• Document Revision History
This document describes how to use the Configurable Logic Cell (CLC) Configuration
Tool as a development tool to emulate and debug firmware on a target board.
The manual layout is as follows:
• Chapter 1. CLC Configuration Tool Overview
• Chapter 2. Manchester Line Code Example
• Appendix A. Manchester Encoding Program (ASSY)
NOTICE TO CUSTOMERS
Preface
CLC CONFIGURATION TOOL
USER’S GUIDE
®
IDE on-line help.
DS41597A-page 5