PIC16F1827T-I/SO Microchip Technology, PIC16F1827T-I/SO Datasheet - Page 321

• Manufacturer Part Number: PIC16F1827T-I/SO
• Description: 7 KB Flash, 384 Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1827T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 26-2:
TABLE 26-2:
 2010 Microchip Technology Inc.
ANSELA
ANSELB
CPSCON0
CPSCON1
INTCON
OPTION_REG
PIE1
PIR1
T1CON
TxCON
TRISA
TRISB
Legend: — = Unimplemented locations, read as ‘0’. Shaded cells are not used by the capacitive sensing module.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3-0
Name
U-0
—
TMR1CS1 TMR1CS0
TMR1GIE
TMR1GIF
WPUEN
Unimplemented: Read as ‘0’
CPSCH<3:0>: Capacitive Sensing Channel Select bits
If CPSON = 0:
If CPSON = 1:
CPSON
TRISA7
TRISB7
ANSB7
SUMMARY OF REGISTERS ASSOCIATED WITH CAPACITIVE SENSING
Bit 7
GIE
—
—
—
These bits are ignored. No channel is selected.
U-0
0000 = channel 0, (CPS0)
0001 = channel 1, (CPS1)
0010 = channel 2, (CPS2)
0011 = channel 3, (CPS3)
0100 = channel 4, (CPS4)
0101 = channel 5, (CPS5)
0110 = channel 6, (CPS6)
0111 = channel 7, (CPS7)
1000 = channel 8, (CPS8)
1001 = channel 9, (CPS9)
1010 = channel 10, (CPS10)
1011 = channel 11, (CPS11)
1100 = Reserved. Do not use.
1101 = Reserved. Do not use.
1110 = Reserved. Do not use.
1111 = Reserved. Do not use.
—
CPSCON1: CAPACITIVE SENSING CONTROL REGISTER 1
TxOUTPS3 TxOUTPS2 TxOUTPS1 TxOUTPS0 TMRxON
INTEDG
TRISA6
TRISB6
ANSB6
ADIE
Bit 6
PEIE
ADIF
—
—
—
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
—
T1CKPS1
TMR0CS
TMR0IE
TRISA5
TRISB5
ANSB5
RCIE
RCIF
Bit 5
—
—
—
T1CKPS0
U-0
TMR0SE
Preliminary
TRISA4
TRISB4
—
ANSA4
ANSB4
INTE
Bit 4
TXIE
TXIF
—
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
CPSRNG1 CPSRNG0
T1OSCEN
CPSCH3
CPSCH3
R/W-0/0
SSP1IE
TRISA3
TRISB3
SSP1IF
ANSA3
ANSB3
IOCIE
Bit 3
PSA
PIC16F/LF1826/27
CPSCH2
T1SYNC
TMR0IF
CCP1IE
CCP1IF
TRISA2
TRISB2
ANSA2
ANSB2
Bit 2
PS2
CPSCH2
R/W-0/0
TxCKPS1
CPSOUT
CPSCH1
TMR2IE
TMR2IF
TRISA1
TRISB1
ANSA1
ANSB1
Bit 1
INTF
PS1
—
CPSCH1
R/W-0/0
TxCKPS0
TMR1ON
CPSCH0
TMR1IE
TMR1IF
TRISA0
TRISB0
ANSA0
T0XCS
IOCIF
Bit 0
PS0
DS41391C-page 321
—
CPSCH0
R/W-0/0
Register
on Page
125
130
320
321
177
187
193
124
129
91
92
96
bit 0