PIC16F1847-I/SO Microchip Technology, PIC16F1847-I/SO Datasheet - Page 118

• Manufacturer Part Number: PIC16F1847-I/SO
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
• Manufacturer: Microchip Technology

Specifications of PIC16F1847-I/SO

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16(L)F1847
REGISTER 11-6:
TABLE 11-3:
DS41453A-page 118
EECON1
EECON2 EEPROM Control Register 2 (not a physical register)
EEADRL EEADRL7 EEADRL6 EEADRL5 EEADRL4 EEADRL3 EEADRL2 EEADRL1 EEADRL0
EEADRH
EEDATL
EEDATH
INTCON
PIE2
PIR2
Legend: — = unimplemented read as ‘0’. Shaded cells are not used by data EEPROM module.
bit 7
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
bit 7-0
Name
W-0/0
*
Page provides register information.
EEDATL7 EEDATL6 EEDATL5 EEDATL4 EEDATL3 EEDATL2 EEDALT1 EEDATL0
EEPGD
OSFIE
OSFIF
Bit 7
GIE
—
—
Data EEPROM Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
EECON1 register. The value written to this register is used to unlock the writes. There are specific
timing requirements on these writes. Refer to
Memory”
SUMMARY OF REGISTERS ASSOCIATED WITH DATA EEPROM
W-0/0
EECON2: EEPROM CONTROL 2 REGISTER
EEADRH6 EEADRH5 EEADRH4 EEADRH3 EEADRH2 EEADRH1 EEADRH0
CFGS
PEIE
C2IE
Bit 6
C2IF
for more information.
—
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W-0/0
EEDATH5 EEDATH4 EEDATH3 EEDATH2 EEDATH1 EEDATH0
TMR0IE
LWLO
Bit 5
C1IE
C1IF
EEPROM Control Register 2
W-0/0
FREE
Bit 4
INTE
EEIE
EEIF
Preliminary
WRERR
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
BCL1IE
BCL1IF
IOCE
Bit 3
W-0/0
Section 11.2.2 “Writing to the Data EEPROM
TMR0IF
WREN
Bit 2
—
—
W-0/0
Bit 1
INTF
WR
—
—
 2011 Microchip Technology Inc.
W-0/0
CCP2IE
CCP2IF
IOCF
Bit 0
RD
Register
on Page
W-0/0
117
118
116
116
116
116
89
91
95
bit 0