PIC16F1847-I/SO Microchip Technology, PIC16F1847-I/SO Datasheet - Page 34

• Manufacturer Part Number: PIC16F1847-I/SO
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
• Manufacturer: Microchip Technology

Specifications of PIC16F1847-I/SO

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16(L)F1847
TABLE 3-8:
DS41453A-page 34
280h
281h
282h
283h
284h
285h
286h
287h
288h
289h
28Ah
28Bh
28Ch
28Dh
28Eh
28Fh
290h
291h
292h
293h
294h
295h
296h
297h
298h
299h
29Ah
29Bh
29Ch
29Dh
29Eh
29Fh
Legend:
Note
Address
Bank 5
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
1:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
—
—
—
—
—
CCPR1L
CCPR1H
CCP1CON
PWM1CON
CCP1AS
PSTR1CON
—
CCPR2L
CCPR2H
CCP2CON
PWM2CON
CCP2AS
PSTR2CON
CCPTMRS
—
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
These registers can be addressed from any bank.
Name
Shaded locations are unimplemented, read as ‘0’.
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Capture/Compare/PWM Register 1 (LSB)
Capture/Compare/PWM Register 1 (MSB)
Unimplemented
Capture/Compare/PWM Register 2 (LSB)
Capture/Compare/PWM Register 2 (MSB)
Unimplemented
CCP1ASE
CCP2ASE
P1RSEN
P2RSEN
Bit 7
GIE
—
—
—
—
—
C4TSEL<1:0>
P1M<1:0>
P2M<1:0>
Write Buffer for the upper 7 bits of the Program Counter
Bit 6
PEIE
—
—
—
—
CCP1AS<2:0>
CCP2AS<2:0>
TMR0IE
Bit 5
—
—
—
—
C3TSEL<1:0>
DC1B<1:0>
DC2B<1:0>
Preliminary
STR1SYNC
STR2SYNC
BSR4
INTE
Bit 4
TO
P1DC<6:0>
P2DC<6:0>
STR1D
STR2D
BSR3
IOCE
Bit 3
PD
PSS1AC<1:0>
PSS2AC<1:0>
C2TSEL<1:0>
TMR0IF
STR1C
STR2C
BSR2
Bit 2
CCP1M<3:0>
CCP2M<3:0>
Z
STR1B
STR2B
 2011 Microchip Technology Inc.
BSR1
INTF
Bit 1
DC
PSS1BD<1:0>
PSS2BD<1:0>
C1TSEL<1:0>
STR1A
STR2A
BSR0
IOCF
Bit 0
C
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
---0 0001 ---0 0001
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
---0 0001 ---0 0001
0000 0000 0000 0000
POR, BOR
Value on:
—
—
—
—
—
—
—
Value on
all other
Resets
—
—
—
—
—
—
—