PIC16F707-I/MV Microchip Technology, PIC16F707-I/MV Datasheet - Page 22

• Manufacturer Part Number: PIC16F707-I/MV
• Description: 14KB Flash Program, MTouch, 32ch CSM, 1.8V-5.5V, 16MHz Internal Oscillator, 8b A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16F707-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 363 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC16F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F707/PIC16LF707
TABLE 2-2:
DS41418A-page 22
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
Legend:
Note 1:
Address
Bank 3
( 2)
( 2)
( 2)
( 2)
( 1),(2)
( 2)
2:
3:
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are transferred to the
upper byte of the program counter.
These registers can be addressed from any bank.
Accessible only when SSPM<3:0> = 1001.
INDF
OPTION_REG
PCL
STATUS
FSR
ANSELA
ANSELB
ANSELC
ANSELD
ANSELE
PCLATH
INTCON
PMCON1
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Name
—
—
—
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
ANSC7
ANSD7
ANSA7
ANSB7
RBPU
Bit 7
IRP
GIE
Addressing this location uses contents of FSR to address data memory (not a physical register)
—
—
—
INTEDG
ANSA6
ANSB6
ANSC6
ANSD6
Bit 6
PEIE
RP1
—
—
—
TMR0CS
TMR0IE
ANSA5
ANSB5
ANSC5
ANSD5
Bit 5
RP0
Program Counter (PC) Least Significant Byte
—
—
—
Indirect Data Memory Address Pointer
Preliminary
TMR0SE
ANSA4
ANSB4
ANSD4
INTE
Bit 4
TO
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
Reserved
Reserved
Reserved
ANSD3
ANSA3
ANSB3
RBIE
Bit 3
PSA
PD
—
—
—
TMR0IF
ANSA2
ANSB2
ANSC2
ANSD2
ANSE2
Bit 2
PS2
—
Z
ANSA1
ANSB1
ANSC1
ANSD1
ANSE1
 2010 Microchip Technology Inc.
INTF
Bit 1
PS1
DC
—
ANSA0
ANSB0
ANSC0
ANSD0
ANSE0
RBIF
Bit 0
PS0
RD
C
xxxx xxxx
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
1111 1111
1111 1111
111- -111
1111 1111
---- -111
---0 0000
0000 000x
1--- ---0
POR, BOR
Value on:
—
—
—
Value on all
xxxx xxxx
1111 1111
0000 0000
000q quuu
uuuu uuuu
1111 1111
1111 1111
111- -111
1111 1111
---- -111
---0 0000
0000 000u
1--- ---0
resets
other
—
—
—