PIC16LF1823-I/ML Microchip Technology, PIC16LF1823-I/ML Datasheet - Page 129

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PIC16LF1823-I/ML

Manufacturer Part Number
PIC16LF1823-I/ML
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 12 I/0, Enhanced Mid Range Core, N
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF1823-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1823-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
REGISTER 12-10: ANSELC: PORTC ANALOG SELECT REGISTER
REGISTER 12-11: WPUC: WEAK PULL-UP PORTC REGISTER
TABLE 12-4:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3-0
Note 1:
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
Note 1:
ANSELC
LATC
OPTION_REG
PORTC
TRISC
WPUC
Legend:
Note 1:
Name
U-0
U-0
2:
When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to
allow external control of the voltage on the pin.
Global WPUEN bit of the OPTION register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
PIC16F/LF1823 only.
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTC.
Unimplemented: Read as ‘0’
ANSC<3:0>: Analog Select between Analog or Digital Function on pins RC<3:0>, respectively
0 = Digital I/O. Pin is assigned to port or digital special function.
1 = Analog input. Pin is assigned as analog input
Unimplemented: Read as ‘0’
WPUC<5:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
WPUEN
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Bit 7
U-0
U-0
INTEDG
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-1/1
WPUC5
U-0
PIC12F/LF1822/PIC16F/LF1823
TMR0CS
WPUC5
TRISC5
LATC5
Bit 5
RC5
R/W-1/1
WPUC4
U-0
Preliminary
TMR0SE
TRISC4
WPUC4
LATC4
Bit 4
RC4
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-1/1
WPUC3
R/W-1/1
ANSC3
WPUC3
TRISC3
ANSC3
LATC3
Bit 3
PSA
RC3
(1)
. Digital input buffer disabled.
TRISC2
WPUC2
ANSC2
LATC2
Bit 2
RC2
R/W-1/1
WPUC2
R/W-1/1
ANSC2
(1)
PS<2:0>
WPUC1
TRISC1
ANSC1
LATC1
Bit 1
RC1
R/W-1/1
ANSC1
R/W-1/1
WPUC1
TRISC0
WPUC0
ANSC0
LATC0
DS41413B-page 129
Bit 0
RC0
R/W-1/1
ANSC0
R/W-1/1
WPUC0
Register
on Page
129
128
175
128
128
129
bit 0
bit 0

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