PIC16LF1938-E/ML Microchip Technology, PIC16LF1938-E/ML Datasheet - Page 189

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PIC16LF1938-E/ML

Manufacturer Part Number
PIC16LF1938-E/ML
Description
28KB Flash, 1KB RAM, 256B EEPROM, LCD, NanoWatt XLP 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF1938-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
19.0
The Timer0 module is an 8-bit timer/counter with the
following features:
• 8-bit timer/counter register (TMR0)
• 8-bit prescaler (independent of Watchdog Timer)
• Programmable internal or external clock source
• Programmable external clock edge selection
• Interrupt on overflow
• TMR0 can be used to gate Timer1
Figure 19-1 is a block diagram of the Timer0 module.
19.1
The Timer0 module can be used as either an 8-bit timer
or an 8-bit counter.
19.1.1
The Timer0 module will increment every instruction
cycle, if used without a prescaler. 8-Bit Timer mode is
selected by clearing the TMR0CS bit of the OPTION
register.
FIGURE 19-1:
 2009 Microchip Technology Inc.
From CPSCLK
T0CKI
F
OSC
TIMER0 MODULE
Timer0 Operation
/4
8-BIT TIMER MODE
T0XCS
0
1
TMR0SE
BLOCK DIAGRAM OF THE TIMER0
TMR0CS
0
1
Preliminary
Prescaler
8-bit
8
PS<2:0>
When TMR0 is written, the increment is inhibited for
two instruction cycles immediately following the write.
19.1.2
In 8-Bit Counter mode, the Timer0 module will increment
on every rising or falling edge of the T0CKI pin or the
Capacitive Sensing Oscillator (CPSCLK) signal.
8-Bit Counter mode using the T0CKI pin is selected by
setting the TMR0CS bit in the OPTION register to ‘1’
and resetting the T0XCS bit in the CPSCON0 register to
‘0’.
8-Bit Counter Mode using the Capacitive Sensing
Oscillator (CPSCLK) signal is selected by setting the
TMR0CS bit in the OPTION register to ‘1’ and setting
the T0XCS bit in the CPSCON0 register to ‘1’.
The rising or falling transition of the incrementing edge
for either input source is determined by the TMR0SE bit
in the OPTION register.
PIC16F193X/LF193X
Note:
The value written to the TMR0 register can
be adjusted, in order to account for the two
instruction cycle delay when TMR0 is
written.
8-BIT COUNTER MODE
PSA
1
0
2 T
Sync
CY
Set Flag bit TMR0IF
Overflow to Timer1
DS41364D-page 189
on Overflow
Data Bus
8
TMR0

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