PIC18F45K20T-I/MV Microchip Technology, PIC18F45K20T-I/MV Datasheet - Page 117

32KB, Flash, 1536bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm T

PIC18F45K20T-I/MV

Manufacturer Part Number
PIC18F45K20T-I/MV
Description
32KB, Flash, 1536bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm T
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F45K20T-I/MV

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-UFQFN Exposed Pad
Processor Series
PIC18
Core
PIC18F
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, SCI, USB, MSSP, RJ11
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
14 uA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
REGISTER 9-9:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
OSCFIP
R/W-1
OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
C1IP: Comparator C1 Interrupt Priority bit
1 = High priority
0 = Low priority
C2IP: Comparator C2 Interrupt Priority bit
1 = High priority
0 = Low priority
EEIP: Data EEPROM/Flash Write Operation Interrupt Priority bit
1 = High priority
0 = Low priority
BCLIP: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
HLVDIP: Low-Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
CCP2IP: CCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
R/W-1
C1IP
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
W = Writable bit
‘1’ = Bit is set
R/W-1
C2IP
R/W-1
EEIP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
BCLIP
PIC18F2XK20/4XK20
HLVDIP
R/W-1
x = Bit is unknown
TMR3IP
R/W-1
DS41303G-page 117
CCP2IP
R/W-1
bit 0

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