PIC18LF14K50T-I/SO Microchip Technology, PIC18LF14K50T-I/SO Datasheet - Page 167

• Manufacturer Part Number: PIC18LF14K50T-I/SO
• Description: 16 KB Flash, 768 RAM, 15 I/O, 10-Bit ADC, USB 2.0, NanoWatt XLP 20 SOIC .300in T
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF14K50T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.3.7
In I
reload value is placed in the SSPADD register
(Figure
Baud Rate Generator will automatically begin counting.
Once
transmission of the last data bit is followed by ACK), the
internal clock will automatically stop counting and the
SCL pin will remain in its last state.
FIGURE 15-17:
TABLE 15-3:
 2010 Microchip Technology Inc.
Note 1:
2
C Master mode, the Baud Rate Generator (BRG)
15-17). When a write occurs to SSPBUF, the
the
48 MHz
48 MHz
48 MHz
40 MHz
40 MHz
40 MHz
16 MHz
16 MHz
16 MHz
4 MHz
4 MHz
4 MHz
The I
100 kHz) in all details, but may be used with care where higher rates are required by the application.
BAUD RATE
F
OSC
given
2
C interface does not conform to the 400 kHz I
I
2
C™ CLOCK RATE W/BRG
operation
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM<3:0>
SCL
is
complete
12 MHz
12 MHz
12 MHz
10 MHz
10 MHz
10 MHz
SSPM<3:0>
4 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
F
CY
Reload
Control
(i.e.,
CLKOUT
Preliminary
Reload
Table 15-3
instruction cycles and the BRG value loaded into
SSPADD.
EQUATION 15-1:
2
BRG Down Counter
C specification (which applies to rates greater than
SSPADD<7:0>
BRG Value
0Ch
0Bh
1Fh
1Dh
18h
63h
09h
27h
02h
09h
00h
77h
PIC18F/LF1XK50
demonstrates clock rates based on
F
SCL
=
----------------------------------------------

SSPADD
F
OSC
(2 Rollovers of BRG)
/2
F
OSC
+
400 kHz
400 kHz
333 kHz
312.5 kHz
1 MHz
1 MHz
DS41350E-page 167
400 kHz
100 kHz
100 kHz
308 kHz
100 kHz
100 kHz
1
F
 4  
SCL
(1)
(1)
(1)
(1)
(1)