PIC24F16KA302T-I/SS Microchip Technology, PIC24F16KA302T-I/SS Datasheet - Page 38

• Manufacturer Part Number: PIC24F16KA302T-I/SS
• Description: 16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, XLP 28 SSOP .209in
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F16KA302T-I/SS

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.1.1
The
word-addressable blocks. Although it is treated as
24 bits wide, it is more appropriate to think of each
address of the program memory as a lower and upper
word, with the upper byte of the upper word being
unimplemented. The lower word always has an even
address, while the upper word has an odd address, as
shown in
Program memory addresses are always word-aligned
on the lower word, and addresses are incremented or
decremented by two during code execution. This
arrangement also provides compatibility with data
memory space addressing and makes it possible to
access data in the program memory space.
4.1.2
All PIC24F devices reserve the addresses between
00000h and 000200h for hard coded program
execution vectors. A hardware Reset vector is provided
to redirect code execution from the default value of the
PC on device Reset to the actual start of code. A GOTO
instruction is programmed by the user at 000000h, with
the actual address for the start of code at 000002h.
PIC24F devices also have two interrupt vector
tables, located from 000004h to 0000FFh and
000104h to 0001FFh. These vector tables allow each
of the many device interrupt sources to be handled
by separate ISRs. A more detailed discussion of the
interrupt vector tables is provided in
“Interrupt Vector (IVT)
FIGURE 4-2:
 2011 Microchip Technology Inc.
program
Figure
PROGRAM MEMORY
ORGANIZATION
HARD MEMORY VECTORS
4-2.
Address
000001h
000003h
000005h
000007h
memory
msw
PROGRAM MEMORY ORGANIZATION
Table”.
space
Program Memory
‘Phantom’ Byte
(read as ‘0’)
00000000
00000000
00000000
00000000
most significant word
is
organized
Section 8.1
23
PIC24FV32KA304 FAMILY
in
16
Instruction Width
4.1.3
In the PIC24FV32KA304 family, the data EEPROM is
mapped to the top of the user program memory space,
starting at address, 7FFE00, and expanding up to
address, 7FFFFF.
The data EEPROM is organized as 16-bit wide memory
and 256 words deep. This memory is accessed using
table read and write operations similar to the user code
memory.
4.1.4
Table 4-1
Configuration Words for the PIC24FV32KA304 family.
Their location in the memory map is shown in
Figure
For more information on device Configuration Words,
see
TABLE 4-1:
least significant word
FBS
FGS
FOSCSEL
FOSC
FWDT
FPOR
FICD
FDS
Configuration Words
Section 26.0 “Special
4-1.
8
provides the addresses of the device
DATA EEPROM
DEVICE CONFIGURATION WORDS
DEVICE CONFIGURATION
WORDS FOR PIC24FV32KA304
FAMILY DEVICES
0
(lsw Address)
Features”.
PC Address
000000h
000002h
000004h
000006h
Configuration Word
Addresses
DS39995B-page 38
F8000A
F8000C
F8000E
F80000
F80004
F80006
F80008
F80010