PIC24FV16KA304-E/ML Microchip Technology, PIC24FV16KA304-E/ML Datasheet - Page 143

16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 44 QFN 8x8x0.9mm

PIC24FV16KA304-E/ML

Manufacturer Part Number
PIC24FV16KA304-E/ML
Description
16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 44 QFN 8x8x0.9mm
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet

Specifications of PIC24FV16KA304-E/ML

Processor Series
PIC24FV
Core
PIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Data Ram Size
2 KB
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
QFN-44
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
38
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
12.0
The Timer1 module is a 16-bit timer which can serve as
the time counter for the Real-Time Clock (RTC), or
operate as a free-running, interval timer/counter. Timer1
can operate in three modes:
• 16-bit Timer
• 16-bit Synchronous Counter
• 16-bit Asynchronous Counter
Timer1 also supports these features:
• Timer Gate Operation
• Selectable Prescaler Settings
• Timer Operation During CPU Idle and Sleep
• Interrupt on 16-bit Period Register Match or
FIGURE 12-1:
 2011 Microchip Technology Inc.
Note:
modes
Falling Edge of External Gate Signal
TIMER1
SOSCO/
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive refer-
ence source. For more information on
Timers, refer to the “PIC24F Family Refer-
ence Manual”, Section 14. “Timers”
(DS39704).
SOSCI
T1CK
Set T1IF
16-BIT TIMER1 MODULE BLOCK DIAGRAM
TGATE
1
0
Reset
Equal
SOSCEN
Comparator
TMR1
PR1
PIC24FV32KA304 FAMILY
Q
Q
Gate
Sync
CK
T
CY
D
Figure 12-1
Timer1 module.
To configure Timer1 for operation:
1.
2.
3.
4.
5.
6.
Set the TON bit (= 1).
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits.
Set or clear the TSYNC bit to configure
synchronous or asynchronous operation.
Load the timer period value into the PR1
register.
If interrupts are required, set the interrupt enable
bit, T1IE. Use the priority bits, T1IP<2:0>, to set
the interrupt priority.
TSYNC
illustrates a block diagram of the 16-bit
1x
01
00
0
1
TON
TGATE
TCS
Sync
TCKPS<1:0>
1, 8, 64, 256
Prescaler
2
DS39995B-page 143

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