PIC24FV16KA304-E/ML Microchip Technology, PIC24FV16KA304-E/ML Datasheet - Page 234

• Manufacturer Part Number: PIC24FV16KA304-E/ML
• Description: 16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 44 QFN 8x8x0.9mm
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV16KA304-E/ML

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-44
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 38
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC24FV32KA304 FAMILY
REGISTER 25-1:
DS39995B-page 234
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7-0
CTMUEN
R/W-0
U-0
—
CTMUEN: CTMU Enable bit
1 = Module is enabled
0 = Module is disabled
Unimplemented: Read as ‘0’
CTMUSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
TGEN: Time Generation Enable bit
1 = Enables edge delay generation
0 = Disables edge delay generation
EDGEN: Edge Enable bit
1 = Edges are not blocked
0 = Edges are blocked
EDGSEQEN: Edge Sequence Enable bit
1 = Edge 1 event must occur before Edge 2 event can occur
0 = No edge sequence is needed
IDISSEN: Analog Current Source Control bit
1 = Analog current source output is grounded
0 = Analog current source output is not grounded
CTTRIG: Trigger Control bit
1 = Trigger output is enabled
0 = Trigger output is disabled
Unimplemented: Read as ‘0’
U-0
U-0
—
—
CTMUCON1: CTMU CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
CTMUSIDL
R/W-0
U-0
—
R/W-0
TGEN
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EDGEN
R/W-0
U-0
—
EDGSEQEN
R/W-0
U-0
—
 2011 Microchip Technology Inc.
x = Bit is unknown
IDISSEN
R/W-0
U-0
—
CTTRIG
R/W-0
U-0
—
bit 8
bit 0