PIC24FV32KA302-E/ML Microchip Technology, PIC24FV32KA302-E/ML Datasheet - Page 180

• Manufacturer Part Number: PIC24FV32KA302-E/ML
• Description: 32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 QFN 6x6mm TUB
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV32KA302-E/ML

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-28
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC24FV32KA304 FAMILY
REGISTER 17-3:
REGISTER 17-4:
DS39995B-page 180
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-6
bit 5
bit 4
bit 3-0
AMSK7
R/W-0
U-0
U-0
U-0
—
—
—
Unimplemented: Read as ‘0’
SMBUSDEL2: SMBus SDAx Input Delay Select bit
1 = The I2C2 module is configured for a longer SMBus input delay (nominal 300 ns delay)
0 = The I2C2 module is configured for a legacy input delay (nominal 150 ns delay)
SMBUSDEL1: SMBus SDAx Input Delay Select bit
1 = The I2C1 module is configured for a longer SMBus input delay (nominal 300 ns delay)
0 = The I2C1 module is configured for a legacy input delay (nominal 150 ns delay)
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
AMSK<9:0>: Mask for Address Bit x Select bits
1 = Enable masking for bit x of incoming message address; bit match not is required in this position
0 = Disable masking for bit x; bit match is required in this position
U-0
U-0
—
—
AMSK6
R/W-0
U-0
—
I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER
PADCFG1: PAD CONFIGURATION CONTROL REGISTER
SMBUSDEL2 SMBUSDEL1
W = Writable bit
‘1’ = Bit is set
R/W-0
W = Writable bit
‘1’ = Bit is set
U-0
—
AMSK5
R/W-0
U-0
—
R/W-0
U-0
—
AMSK4
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
AMSK3
R/W-0
U-0
—
U-0
U-0
—
—
AMSK2
R/W-0
U-0
—
 2011 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
AMSK9
AMSK1
R/W-0
R/W-0
U-0
U-0
—
—
AMSK8
AMSK0
R/W-0
R/W-0
U-0
U-0
—
—
bit 8
bit 0
bit 8
bit 0