PIC24FV32KA302-E/ML Microchip Technology, PIC24FV32KA302-E/ML Datasheet - Page 242

• Manufacturer Part Number: PIC24FV32KA302-E/ML
• Description: 32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 QFN 6x6mm TUB
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV32KA302-E/ML

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-28
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC24FV32KA304 FAMILY
REGISTER 26-5:
DS39995B-page 242
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7,5
bit 6
bit 4
bit 3-0
FWDTEN1
R/P-1
FWDTEN<1:0>: Watchdog Timer Enable bit
11 = WDT is enabled in hardware
10 = WDT is controlled with the SWDTEN bit setting
01 = WDT is enabled only while device is active; WDT is disabled in Sleep; SWDTEN bit is disabled
00 = WDT is disabled in hardware; SWDTEN bit is disabled
WINDIS: Windowed Watchdog Timer Disable bit
1 = Standard WDT is selected; windowed WDT is disabled
0 = Windowed WDT is enabled; note that executing a CLRWDT instruction while the WDT is disabled in
FWPSA: WDT Prescaler bit
1 = WDT prescaler ratio of 1:128
0 = WDT prescaler ratio of 1:32
WDTPS<3:0>: Watchdog Timer Postscale Select bits
1111 = 1:32,768
1110 = 1:16,384
1101 = 1:8,192
1100 = 1:4,096
1011 = 1:2,048
1010 = 1:1,024
1001 = 1:512
1000 = 1:256
0111 = 1:128
0110 = 1:64
0101 = 1:32
0100 = 1:16
0011 = 1:8
0010 = 1:4
0001 = 1:2
0000 = 1:1
WINDIS
R/P-1
hardware and software (FWDTEN<1:0> = 00 and RCON bit, SWDTEN = 0) will not cause a device
Reset
FWDT: WATCHDOG TIMER CONFIGURATION REGISTER
P = Programmable bit
‘1’ = Bit is set
FWDTEN0
R/P-1
FWPSA
R/P-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WDTPS3
R/P-1
WDTPS2
R/P-1
 2011 Microchip Technology Inc.
x = Bit is unknown
WDTPS1
R/P-1
WDTPS0
R/P-1
bit 0