PIC24HJ64GP510A-I/PT Microchip Technology, PIC24HJ64GP510A-I/PT Datasheet - Page 41

16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 12x12x1mm TRAY

PIC24HJ64GP510A-I/PT

Manufacturer Part Number
PIC24HJ64GP510A-I/PT
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 12x12x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP510A-I/PT

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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5.7
The 8-bit Configuration registers are programmable, one
register at a time. The default programming values
recommended for the Configuration registers are shown
in
value is 0x00, which selects the FRC clock oscillator
setting.
TABLE 5-6:
© 2010 Microchip Technology Inc.
Table
Writing Configuration Memory
5-6. The recommended default FOSCSEL
0xF8000A
0xF8000C
0xF8000E
0xF8000A
0xF8000C
0xF8000E
0xF8000A
0xF8000C
0xF8000E
0xF80000
0xF80004
0xF80006
0xF80008
0xF80010
0xF80012
0xF80000
0xF80004
0xF80006
0xF80008
0xF80010
0xF80012
0xF80014
0xF80016
0xF80000
0xF80004
0xF80006
0xF80008
0xF80010
0xF80012
0xF80014
0xF80016
Address
Address
Address
dsPIC33FJ12GP201/202, dsPIC33FJ12MC201/202 AND PIC24HJ12GP201/202
dsPIC33FJ32GP202/204, dsPIC33FJ32MC202/204 AND PIC24HJ32GP202/204
DEFAULT CONFIGURATION REGISTER VALUES
dsPIC33FJ06GS101/102/202 AND dsPIC33FJ16GS402/404/502/504
dsPIC33FJ16GP304, dsPIC33FJ16MC304 AND PIC24HJ16GP304
FOSCSEL
FOSCSEL
FOSCSEL
FWDT
FUID0
FUID1
FWDT
FUID0
FUID1
FUID2
FUID3
FWDT
FUID0
FUID1
FUID2
FUID3
Name
FOSC
FPOR
Name
FOSC
FPOR
Name
FOSC
FPOR
FICD
FICD
FICD
FGS
FGS
FGS
FBS
FBS
FBS
The FBS, FSS and FGS Configuration registers are
special since they enable code protection for the
device. For security purposes, once any bit in these
registers is programmed to ‘0’ (to enable code
protection), it can only be set back to ‘1’ by performing
a Bulk Erase as described in
Program
from a ‘0’ to ‘1’ is not possible, but they may be
programmed from a ‘1’ to ‘0’ to enable code protection.
Memory”. Programming any of these bits
Default Value
Default Value
Default Value
Section 5.5 “Erasing
0xDF
0xDF
0xDF
0x0F
0xE7
0x0F
0xE3
0xFF
0xFF
0x0F
0xE7
0xF7
0xE3
0xFF
0xFF
0xFF
0xFF
0x0F
0xE7
0xF7
0xE3
0xFF
0xFF
0xFF
0xFF
0x07
0x87
0x07
0x87
0x07
0x87
DS70152H-page 41

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