PIC32MX564F064H-I/MR Microchip Technology, PIC32MX564F064H-I/MR Datasheet - Page 133

• Manufacturer Part Number: PIC32MX564F064H-I/MR
• Description: 64 PINS, 64KB Flash, 32KB RAM, 80 MHz, USB, CAN, 4 DMA 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX564F064H-I/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Processor Series: PIC32MX5x
• Core: MIPS32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

14.0
This family of PIC32 devices features four synchronous
16-bit timers (default) that can operate as a free-
running interval timer for various timing applications
and counting external events. The following modes are
supported:
• Synchronous internal 16-bit timer
• Synchronous internal 16-bit gated timer
• Synchronous external 16-bit timer
FIGURE 14-1:
© 2010 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note 1: ADC event trigger is available on Timer3 only.
Trigger
2: Some registers and associated bits
ADC Event
TIMER2/3, TIMER4/5
TxIF
Event Flag
TxCK
2: TxCK pins are not available on 64-pin devices.
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS61105)
Reference Manual” , which is available
from
(www.microchip.com/PIC32).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
(2)
(1)
TGATE (TxCON<7>)
the
TIMER2, 3, 4, 5 BLOCK DIAGRAM (16-BIT)
0
1
of
Microchip
Reset
Equal
the
“PIC32
Comparator x 16
web
TMRx
PRx
Family
site
Q
Q
in
PBCLK
Gate
Sync
D
Two 32-bit synchronous timers are available by
combining Timer2 with Timer3 and Timer4 with Timer5.
The 32-bit timers can operate in three modes:
• Synchronous internal 32-bit timer
• Synchronous internal 32-bit gated timer
• Synchronous external 32-bit timer
14.1
• Selectable clock prescaler
• Timers operational during CPU idle
• Time base for Input Capture and Output Compare
• ADC event trigger (Timer3 only)
• Fast bit manipulation using CLR, SET and INV
PIC32MX5XX/6XX/7XX
Note:
modules (Timer2 and Timer3 only)
registers
Additional Supported Features
1 0
x 1
0 0
In this chapter, references to registers,
TxCON, TMRx and PRx, use ‘x’ to repre-
sent Timer2 through 5 in 16-bit modes. In
32-bit modes, ‘x’ represents Timer2 or 4;
‘y’ represents Timer3 or 5.
TCS (TxCON<1>)
TGATE (TxCON<7>)
ON (TxCON<15>)
TCKPS (TxCON<6:4>)
1, 2, 4, 8, 16,
32, 64, 256
Prescaler
Sync
DS61156F-page 133
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