PIC32MX564F064H-I/MR Microchip Technology, PIC32MX564F064H-I/MR Datasheet - Page 170

64 PINS, 64KB Flash, 32KB RAM, 80 MHz, USB, CAN, 4 DMA 64 QFN 9x9x0.9mm TUBE

PIC32MX564F064H-I/MR

Manufacturer Part Number
PIC32MX564F064H-I/MR
Description
64 PINS, 64KB Flash, 32KB RAM, 80 MHz, USB, CAN, 4 DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet

Specifications of PIC32MX564F064H-I/MR

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Processor Series
PIC32MX5x
Core
MIPS32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC32MX5XX/6XX/7XX
28.2
This section describes the operation of the WDT and
Power-up Timer of the PIC32MX5XX/6XX/7XX.
The WDT, when enabled, operates from the internal
Low-Power Oscillator (LPRC) clock source and can be
used to detect system software malfunctions by reset-
ting the device if the WDT is not cleared periodically in
software. Various WDT time-out periods can be
selected using the WDT postscaler. The WDT can also
be used to wake the device from Sleep or Idle mode.
FIGURE 28-1:
DS61156F-page 170
WDTCLR = 1
WDT Enable
WDT Enable
Reset Event
Watchdog Timer (WDT)
PWRT Enable
Oscillator
WDT Enable
LPRC
Wake
WATCHDOG AND POWER-UP TIMER BLOCK DIAGRAM
WDT Counter Reset
Clock
25-bit Counter
FWDTPS<4:0> (DEVCFG1<20:16>)
The following are some of the key features of the WDT
module:
• Configuration or software controlled
• User-configurable time-out period
• Can wake the device from Sleep or Idle
1:64 Output
25
1
Decoder
PWRT Enable
Power Save
© 2010 Microchip Technology Inc.
0
1
LPRC
Control
PWRT
Device Reset
NMI (Wake-up)

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