LM2742MTC National Semiconductor, LM2742MTC Datasheet - Page 13

• Manufacturer Part Number: LM2742MTC
• Manufacturer: National Semiconductor

Specifications of LM2742MTC

• Lead Free Status / RoHS Status: Not Compliant

the equation for P
design were for a 5V to 2.5V circuit, an equal number of FETs
on the high and low sides would be the best solution. With the
duty cycle D = 0.24, it becomes apparent that the low side
FET carries the load current 76% of the time. Adding a second
FET in parallel to the bottom FET could improve the efficiency
by lowering the effective R
more effective a second or even third FET can be. For a min-
imal increase in gate charging loss (0.054W) the decrease in
conduction loss is 0.15W. What was an 85% design improves
to 86% for the added cost of one SO-8 MOSFET.
Control Loop Components
The circuit is this design example and the others shown in the
Example Circuits section have been compensated to improve
their DC gain and bandwidth. The result of this compensation
is better line and load transient responses. For the LM2742,
the top feedback divider resistor, Rfb2, is also a part of the
compensation. For the 10A, 5V to 1.2V design, the values are:
Cc1 = 4.7pF 10%, Cc2 = 1nF 10%, Rc = 229kΩ 1%. These
values give a phase margin of 63° and a bandwidth of
29.3kHz.
Support Capacitors and Resistors
The Cinx capacitors are high frequency bypass devices, de-
signed to filter harmonics of the switching frequency and input
noise. Two 1µF ceramic capacitors with a sufficient voltage
rating (10V for the Circuit of Figure 4) will work well in almost
any case.
R
sure smooth DC voltage for the chip supply. Depending on
noise, R
0.1 and 2.2 µF. C
be 0.1µF. (In the case of a separate, higher supply to the
BOOT pin, this 0.1µF cap can be used to bypass the supply.)
Using a Schottky device for the bootstrap diode allows the
minimum drop for both high and low side drivers. The On
Semiconductor BAT54 or MBR0520 work well.
Rp is a standard pull-up resistor for the open-drain power
good signal, and should be 10kΩ. If this feature is not neces-
sary, it can be omitted.
R
sign calls for a peak current magnitude (Io + 0.5 * ΔI
a safe setting would be 15A. (This is well below the saturation
current of the output inductor, which is 25A.) Following the
equation from the Current Limit section, use a 3.3kΩ resistor.
R
lowing the equation in the Theory of Operation section, the
closest 1% tolerance resistor to obtain f
88.7kΩ.
C
tion for C
delay, a 12nF capacitor will suffice.
EFFICIENCY CALCULATIONS
A reasonable estimation of the efficiency of a switching con-
troller can be obtained by adding together the loss is each
current carrying element and using the equation:
IN
CS
FADJ
SS
and C
depends on the users requirements. Based on the equa-
is the resistor used to set the current limit. Since the de-
is used to set the switching frequency of the chip. Fol-
IN
SS
IN
should be 10 to 100Ω, and C
are standard filter components designed to en-
in the Theory of Operation section, for a 3ms
BOOT
CND
is the bootstrap capacitor, and should
the result is a loss of 0.533W. If this
DSON
. The lower the duty cycle, the
IN
should be between
SW
= 300kHz is
o
) of 12A,
13
The following shows an efficiency calculation to complement
the Circuit of Figure 4. Output power for this circuit is 1.2V x
10A = 12W.
Chip Operating Loss
2mA x 5V = 0.01W
FET Gate Charging Loss
The value n is the total number of FETs used. The Si4442DY
has a typical total gate charge, Q
4.1mΩ.
2*5*36E
FET Switching Loss
The Si4442DY has a typical rise time t
and 47ns, respectively. 0.5*5*10*58E
FET Conduction Loss
Input Capacitor Loss
4.28
Input Inductor Loss
2.82
Output Inductor Loss
10
System Efficiency
2
*0.004 = 0.4W
2
2
*0.018/2 = 0.164W
*0.007 = 0.055W
-9
*300,000 = 0.108W
For
P
SW
a
P
GC
= 0.5 * V
P
P
single
Lout
Lin
= n * V
P
P
IQ
= I
= I
Cn
= I
2
2
in
= 0.533W
in
o
Q-V
CC
FET
* I
* DCR
* DCR
O
CC
* Q
GS
* (t
*V
GS
on
, of 36nC and an r
output-L
input-L
CC
r
+ t
-9
* f
*300,000 = 0.435W
r
OSC
f
)* f
and fall time t
top
OSC
and
www.national.com
bottom:
ds-on
f
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