M368L3223FUN-CCC Samsung Semiconductor, M368L3223FUN-CCC Datasheet - Page 3

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M368L3223FUN-CCC

Manufacturer Part Number
M368L3223FUN-CCC
Description
Manufacturer
Samsung Semiconductor
Datasheet

Specifications of M368L3223FUN-CCC

Lead Free Status / RoHS Status
Compliant
128MB, 265MB, 512MB Unbuffered DIMM
184Pin Unbuffered DIMM based on 256Mb F-die (x16)
Ordering Information
Operating Frequencies
Feature
• Power supply : Vdd: 2.6V ± 0.1V, Vddq: 2.6V ± 0.1V
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• Programmable Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333
• Programmable Burst length (2, 4, 8)
• Programmable Burst type (sequential & interleave)
• Edge aligned data output, center aligned data input
• Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh)
• Serial presence detect with EEPROM
• 66pin TSOP II
RoHS compliant
M368L1624FUM-C(L)CC/C4
M381L3223FUM-C(L)CC/C4
M381L6423FUM-C(L)CC/C4
M368L3223FUN-C(L)CC/C4
M368L6423FUN-C(L)CC/C4
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
CL-tRCD-tRP
Part Number
Speed @CL3
Pb-Free
package
Density
128MB
256MB
256MB
512MB
512MB
CC(DDR400@CL=3)
200MHz
Organization
3-3-3
16M x 64
32M x 64
32M x 72
64M x 64
64M x 72
16Mx16 (K4H561638F) * 4EA
32Mx8 (K4H560838F) * 8EA
32Mx8 (K4H560838F) * 9EA
32Mx8 (K4H560838F) * 16EA
32Mx8 (K4H560838F) * 18EA
Component Composition
Rev. 1.0 October. 2004
C4(DDR400@CL=3)
200MHz
3-4-4
DDR SDRAM
1,250mil
1,250mil
1,250mil
1,250mil
1,250mil
Height

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