IDT71321SA55JG IDT, Integrated Device Technology Inc, IDT71321SA55JG Datasheet - Page 2

• Manufacturer Part Number: IDT71321SA55JG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT71321SA55JG

• Density: 16Kb
• Access Time (max): 55ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 11b
• Package Type: PLCC
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 155mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 52
• Word Size: 8b
• Number Of Words: 2K
• Lead Free Status / RoHS Status: Compliant

INDEX
Description
RAMs with internal interrupt logic for interprocessor communications.
The IDT71321 is designed to be used as a stand-alone 8-bit Dual-
Port Static RAM or as a "MASTER" Dual-Port Static RAM together
with the IDT71421 "SLAVE" Dual-Port in 16-bit-or-more word width
systems. Using the IDT MASTER/SLAVE Dual-Port Static RAM ap-
proach in 16-or-more-bit memory system applications results in full
speed, error-free operation without the need for additional discrete
logic.
Pin Configurations
NOTES:
1. All V
2. All GND pins must be connected to ground supply.
3. J52-1 package body is approximately .75 in x .75 in x .17 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
IDT71321SA/LA and IDT71421SA/LA
High Speed 2K x 8 Dual-Port Static RAM with Interrupts
The IDT71321/IDT71421 are high-speed 2K x 8 Dual-Port Static
Both devices provide two independent ports with separate control,
PN64-1 package body is approximately 14mm x 14mm x 1.4mm.
PP64-1 package body is approximately 10mm x 10mm x 1.4mm.
I/O
I/O
I/O
I/O
A
A
A
A
A
A
A
A
A
CC
1L
2L
3L
4L
5L
6L
7L
8L
9L
0L
1L
2L
3L
pins must be connected to power supply.
8
9
10
11
12
13
14
15
16
17
18
19
20
21
7
22
6
23
5
24
4
25
3
IDT71321/421J
Top View
26
2
(1,2,3)
J52-1
PLCC
27
1
52
28
(4)
(5)
51
29
50
30
49
31
48
32
47
33
46
45
44
43
42
41
40
39
38
37
36
35
34
INDEX
I/O
I/O
I/O
6.42
OE
OE
A
A
A
A
A
A
A
A
A
A
NC
I/O
N/C
N/C
2691 drw 02
A
A
A
A
A
A
A
A
A
A
2
0R
1R
2R
3R
4R
5R
6R
7R
8R
9R
0L
1L
2L
3L
4L
5L
6L
7L
8L
9L
0L
1L
2L
address, and I/O pins that permit independent, asynchronous access
for reads or writes to any location in memory. An automatic power
down feature, controlled by CE, permits the on chip circuitry of each
port to enter a very low standby power mode.
devices typically operate on only 325mW of power. Low-power (LA)
versions offer battery backup data retention capability, with each Dual-
Port typically consuming 200µW from a 2V battery.
64-pin TQFPs, and 64-pin STQFPs.
L
7R
R
Fabricated using IDT's CMOS high-performance technology, these
The IDT71321/IDT71421 devices are packaged in 52-pin PLCCs,
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
,
Industrial and Commercial Temperature Ranges
IDT71321/421PF or TF
PN64-1 / PP64-1
64-Pin STQFP
64-Pin TQFP
Top View
(5)
(4)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
2691 drw 03
A
A
A
A
A
A
A
N/C
A
A
A
N/C
N/C
I/O
I/O
OE
0R
1R
2R
3R
4R
5R
6R
7R
8R
9R
7R
6R
R
,