MC9S08GT60ACFDE Freescale, MC9S08GT60ACFDE Datasheet - Page 98

MC9S08GT60ACFDE

Manufacturer Part Number
MC9S08GT60ACFDE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08GT60ACFDE

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
39
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8/2.08V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Program Memory Type
Flash
Program Memory Size
60KB
Lead Free Status / RoHS Status
Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08GT60ACFDE
Manufacturer:
NXP
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Part Number:
MC9S08GT60ACFDE
Manufacturer:
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Quantity:
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Chapter 6 Parallel Input/Output
98
PTEDD[7:0]
PTEPE[7:0]
PTESE[7:0]
Reset
Reset
Reset
Field
Field
Field
7:0
7:0
7:0
W
W
W
R
R
R
PTEPE7
PTESE7
PTEDD7
Pullup Enable for Port E Bits — For port E pins that are inputs, these read/write control bits determine whether
internal pullup devices are enabled. For port E pins that are configured as outputs, these bits are ignored and the
internal pullup devices are disabled.
0 Internal pullup device disabled.
1 Internal pullup device enabled.
Slew Rate Control Enable for Port E Bits — For port E pins that are outputs, these read/write control bits
0 Slew rate control disabled.
1 Slew rate control enabled.
Data Direction for Port E Bits — These read/write bits control the direction of port E pins and what is read for
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port E bit n and PTED reads return the contents of PTEDn.
0
0
0
7
7
7
determine whether the slew rate controlled outputs are enabled. For port E pins that are configured as inputs,
these bits are ignored.
PTED reads.
PTEDD6
PTEPE6
PTESE6
Figure 6-27. Slew Rate Control Enable for Port E (PTESE)
0
0
0
6
6
6
Figure 6-28. Data Direction for Port E (PTEDD)
Figure 6-26. Pullup Enable for Port E (PTEPE)
Table 6-18. PTEPE Field Descriptions
Table 6-19. PTESE Field Descriptions
Table 6-20. PTEDD Field Descriptions
PTEDD5
PTEPE5
PTESE5
MC9S08GB60A Data Sheet, Rev. 2
0
0
0
5
5
5
PTEDD4
PTEPE4
PTESE4
0
0
0
4
4
4
Description
Description
Description
PTEDD3
PTEPE3
PTESE3
3
0
3
0
3
0
PTEDD2
PTEPE2
PTESE2
0
0
0
2
2
2
PTEPE1
PTESE1
PTEDD1
Freescale Semiconductor
0
0
0
1
1
1
PTEDD0
PTEPE0
PTESE0
0
0
0
0
0
0

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