PPC440EPX-SUA667T Applied Micro Circuits Corporation, PPC440EPX-SUA667T Datasheet - Page 63

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PPC440EPX-SUA667T

Manufacturer Part Number
PPC440EPX-SUA667T
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet

Specifications of PPC440EPX-SUA667T

Family Name
440EPx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
667MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5/3.3V
Operating Supply Voltage (max)
1.6/3.45V
Operating Supply Voltage (min)
1.425/3.15V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
680
Package Type
TEBGA
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PPC440EPX-SUA667T
Manufacturer:
FUJITSU
Quantity:
143
Revision 1.30 – February 27, 2009
Table 8. Signal Functional Description (Sheet 8 of 9)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to OV
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to OV
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
AMCC Proprietary
System Interface
SysClk
SysErr
SysReset
Halt
TmrClk
GPIO00:15
GPIO22:23
GPIO26:48
GPIO16:21
GPIO24:25
GPIO49:63
TestEn
RcvrInh
ModeCtrl
LeakTest
LeakTest2
RefEn
DrvrInh1:2
TherMonA:B
PSROOut
Data Sheet
Signal Name
Main system clock input.
Set to 1 when a machine check is generated.
Processor timer external input clock.
Main system reset. External logic can drive this bidirectional pin
low (minimum of 16 cycles) to initiate a system reset. A system
reset can also be initiated by software. Implemented as an open-
drain output (two states; 0 or open circuit).
Halt from external debugger.
General purpose I/O. To access these functions, software must
set DCR register bits.
General purpose I/O. To access these functions, software must
set DCR register bits.
General purpose I/O. To access these functions, software must
set DCR register bits.
Test Enable.
Note: Do not connect for normal operation.
Receiver Inhibit. Active only when TestEn is active. Used for
manufacturing test only.
Mode Control. Active only when TestEn is active. Used for
manufacturing test only.
Leakage Test. Active only when TestEn is active. Used for
manufacturing test only.
Reference Enable. Active only when TestEn is active. Used for
manufacturing test only.
Driver Inhibit. Active only when TestEn is active. Used for
manufacturing test only.
On-chip PNP thermal monitor transistor.
A is the emitter and B is the base. The collector is grounded.
Module characterization and screening. Use for test purposes
only. Tie down as specified in Note 3 for normal operation.
DD
(EOV
Description
DD
DD
for Ethernet)
440EPx – PPC440EPx Embedded Processor
(EOV
DD
for Ethernet)
I/O
I/O
I/O
I/O
I/O
O
O
I
I
I
I
I
I
I
I
I
I
Perf screen ring
Rcvr w/pull-up
3.3V tolerant
3.3V tolerant
3.3V tolerant
3.3V tolerant
3.3V tolerant
3.3V tolerant
2.5V CMOS
2.5V CMOS
2.5V CMOS
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
2.5V CMOS
2.5V CMOS
3.3V LVTTL
3.3V LVTTL
2.5V CMOS
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
Rcvr w/pull-
w/pull-up
w/pull-up
oscillator
Thermal
monitor
down
Type
Rcvr
Notes
1, 2
1, 3
1
1
1
1
1
1
1
1
5
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