ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 180

• Manufacturer Part Number: ALXD800EEXJCVD C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJCVD C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

5.5.2.86 L2 TLB/DTE/PTE Entry MSR (L2TLB_ENTRY_MSR)
MSR Address
Type
Reset Value
180
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
If SEL bits in L2TLB_INDEX MSR = 0x (MSR 0000189Ch[17:16] = 0x)
21:16
63:44
43:35
31:12
15:1
11:9
Bits
Bit
34
33
32
0
8
Name
PTE_LRU
RSVD (RO)
L2WR1
Name
LINADDR
RSVD (RO)
WP
WA_WS
WC
PHYSADDR
RSVD (RO)
GLOBAL
LINADDR
0000189Eh
R/W
00000000_00000000h
33234H
Description
4M PTE Least Recently Used Value.
Bit 21: 4M PTE entry 0 more recent than entry 1.
Bit 20: 4M PTE entry 0 more recent than entry 2.
Bit 19: 4M PTE entry 0 more recent than entry 3.
Bit 18: 4M PTE entry 1 more recent than entry 2.
Bit 17: 4M PTE entry 1 more recent than entry 3.
Bit 16: 4M PTE entry 2 more recent than entry 3.
0: False (Default)
1: True
Reserved (Read Only). (Default = 0)
L2 Write to Way 1. Next L2 TLB write to way 1 if both ways are valid. (Default = 0)
L2TLB_LRU_MSR Bit Descriptions (Continued)
PHYSADDR
LINADDR
Description
Linear Address. Address [32:12].
Reserved (Read Only).
Write-protect Flag.
0: Page can be written.
1: Page is write-protected.
Write-allocate/Write-serialize Flag. If the page is cacheable, a 1 indicates the write-
allocate flag. If the page is non-cacheable, a 1 indicates the write-serialize flag.
Write-combine Flag. When this page is marked as non-cacheable, a 1indicates that
writes may be combined before being sent to the bus.
Physical Address. Address [32:12]
Reserved (Read Only).
Global Page Flag. A 1 indicates a global page.
L2TLB_ENTRY_MSR Bit Descriptions
L2TLB_ENTRY_MSR Register Map
RSVD
RSVD
AMD Geode™ LX Processors Data Book
9
8
RSVD
CPU Core Register Descriptions
7
6
5
4
3
2
1
0