MC68882RC25A Freescale, MC68882RC25A Datasheet - Page 2

• Manufacturer Part Number: MC68882RC25A
• Manufacturer: Freescale

Specifications of MC68882RC25A

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

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MOTOROU
.;. >
the MC68882.
face supported
the interface implemented
or MC68030
ante, however,
plify the programmer’s
is designed
current operation
uses a subset of the general
or MC68030
which
devices
goal of the M68000
provide
upon sequential
rent
MC68020 or MC68030 whenever
where
via the M68000 coprocessor
peripheral
sor is the MC68000, MC68008, or MC68010.
interface
mer perceives the MPU/FPCP execution
,,:,~’~~~~~dprocessor detection
‘ ,J:gt, ........
The MC68882
The MC68882 utilizes the M68000 Family coprocessor
The MC68882 functions
. .
.
. The main
. The main processor(s)
~f3%$BNt
operations
type are allowed.
cessor at the request of the MC68882.
Support
terns is provided
Up to eight coprocessor
simultaneously.
The main processor(s)
All effective
All data tran~fdxk$:~~e performed
cessor at ~~’~we~uest of the MC68882.
Overla~@
g&~t@~*~r’s
a trap to be taken are serviced
instructions.
Systems
via standard
cations
of the individual
caches, addressing
at different
MC68882 instructions
provided
processor
han~,~~?~bughput
software.
MC68882 without
is transparent
the MC68020 or MC68030 is the main processor
the programmer
are implemented
to provide
THE COPROCESSOR
processor
to emulate,
ion,
and the MC68882.
registers
are not dependent
.*:\, i j+p, , \:t
of virtual
by the MC68020 or MC68030. Features of
the coprocessor
by the main @#o<$#&or.
may
is a non-DMA
at th~t~~~si~
in the
instruction
processor(s)
between the MC68020 or MC68030 and
clock speeds.
ft’bncurrent)
addreqqb~~q’y%calcu lated by the main
model
M68000 bus cycles.
a logical extension
Family
in systems where the main proces-
to the programmer.
use software
Multiple
devices (e.g., instruc@~$~ip&s
and instruction
model, the coprocessor
as closely as possible,
via the FSAVE and FRESTORE
reassembling
with an execution
MC68882
memory/virtual
in the MC68882 are as follows:
modes).
~:+ ~’ ~ \;~,
on one chip. A fundamental
while
as a coprocessor
of sequential
util,i~~,a$~~ddressing
and MC68882 communicat~~~~jw’
of exceptions
coprocessor
execution
Freescale Semiconductor, Inc.
purpose
and MC6@~~~@ay operate
interface.
and MC68882
., *,*$
coprocessor
instruction
of the coprocessor.
type coprocessor
For More Information On This Product,
possible. In order to sim-
may reside in a system
interface
For optimum
.?,$:,,,
maintaining
upon the a~@:a&cture
CONCEPT
with
,“~.!..
~:.,?..:,..
7* “’’”.:
emulation
coprocessor
. ~’x$:’~kl,
by the main pro-
, ‘:. +f{”i,~
or relinking
by the main pro-
set in a manner
by the MC68020
{,m ‘+<
It functions
model as if both
~).:t.x,
of the MC68020
respect
Go to: www.freescale.com
V;>!]*Q,
allows concur-
,.~\
interface
which require
machine
The program-
execution
.*
model based
instruction
of the same
“..i.
in systems
cO.~mUti:i-
the
non-con-
perform-
interface
modes
of the
to the
which
inter-
user
is to
pro-
sys-
as a
en-
or
~**. ~~ eight integer
‘ “$~e~ MC68882 device pair functions
.!>
#“~68020
.,.~eg$~ters as though
the MC68882
the
the MC68020
bus. Figure 7 illustrates
ration.
into three
interface.
MC68882 is based on a chip select which is decoded from
eight floating-point
ing-point
consumption,
cessor in systems where t@@~~C68020 or MC68030 is not
the main processor
The configuration
cessor or coprocqs$@~’m#y
user software
in either co~~$~::atfon).
as a lo~i~.,1, e~tension
Beca~$@o~the
~~fi80’*
1 through
vice designed
or MC68030
etry process. This process allows CMOS and HMOS (high
density NMOS) gates to be combined
CMOS structures
is required,
mum silicon
creases
ably small die size.
as a coprocessor.
mented
The connection
As shown in Figure 8, the MC68882 is internally
The MC68882 programming
The ar~&$,~~’re
The MC68882
The MC68882 is a high performance
e
MC68020
These registers
A 32-bit control
for each class of exception
set the
A 32-bit status register that contains
condition
tus information.
A 32-bit instruction
the main
floating-point
address is used in exception
instruction
modes.
Eight 80-bit floating-point
registers
pose (i.e., any instruction
in HCMOS, Motorola’s
speed
The MC68882 is connected
or MC68030 programmer
and integer
or MC68030. Thus, a MC68020 or MC68030 and
6 and consists
processing
and HMOS structures
data registers,
virtual
area is desired.
is a simple
or MC68030
(i.e.;%~~’%ame object code maybe
yet still confines
to interface
or MC68030,
HARDWARE
coupling
user-selectable
(DO-D7) and are completely
codes, quotient
processor
performance
can also Qf ~~,$as
~,..s ,,,‘,~ ‘
that caused the exception,
between the MC68020 or MC68030 and
This device fully supports
are used where speed a~@,l~~,~ower
o~$~
of the MC68882
data registers supporting
(e,&};,W&OOO,
instruction
machine
the
data types.
of the M68000 Family architecture,
are analogous
elements:
register
of the coprocessor
the MPU/coprocessor
,@68882
of the following:
extension
address register that contains
with the MC68020 or MC68030
registers
memory
function
be completely
eight address registers,
OVERVIEW
and the
,*~-.
architecture
model is shown in Figures
Using t~,~ W&Whology
,, j ,,’.J-,$\\
th~’~~~~~~1
that contains
whi~g%~!$g
rounding
that was executed.
low power,
data registers (FPO-FP7).
can use any register).
bits, and exception
the bus interface
trap, and mode bits to
‘~.s,~;.
!~ ‘k
as one processor
can view the MC68882
handling
are use~, W%re mini-
MC68008, MC68010).
I..\..
as a peripheral
are resident
appears to the user
codes and address
address
of the M68000
as a coprocessor
on the sa,,~<~~evice.
to the integer
,“..t+~
a peripheral
selection
floating-point
. ::,t. ~ .,;.i. + ~$~
..,,.’~>
and
transparent
floating-point
and is imple-
interface,
the MC68020
BRW/Rev.
general
to locate the
small geom-
to a reason-
seven float-
low power
enable bits
of the last
.,
precision
executed
configu-
M~
divided
of the
in the
This
with
data
unit
pur-
pro-
pro-
sta-
bus
and
the
de-
to
in-
to
3
,~,
p
,p
\.;
,.
..
,..-
‘./
-,