MC94MX21DVKN3 Freescale, MC94MX21DVKN3 Datasheet - Page 36

• Manufacturer Part Number: MC94MX21DVKN3
• Manufacturer: Freescale

Specifications of MC94MX21DVKN3

• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Specifications
3.12.1
The card identification and card operation conditions timing are processed in open-drain mode. The card
response to the host command starts after exactly N
SET_RCA is also processed in the open-drain mode. The minimum delay between the host command and
card response is NCR clock cycles as illustrated in
Figure 30
After a card receives its RCA, it switches to data transfer mode. As shown on the first diagram in
Figure
period of two Z bits (allowing time for direction switching on the bus) and then by P bits pushed up by the
responding card. The other two diagrams show the separating periods N
36
27, SD_CMD lines in this mode are driven with push-pull drivers. The command is followed by a
are defined in
Command Response Timing on MMC/SD Bus
Symbol
CRC
D
Z
*
Table 26. State Signal Parameters for
Cyclic redundancy check bits (7 bits)
CMD
CMD
Table
Card Active
Figure 26. Timing Diagrams at Identification Mode
S T
S T
High impedance state
26.
Host Command
Host Command
Definition
Repetition
Content
Content
Data bits
MC94MX21 Technical Data, Rev. 1.5
CRC
CRC
E Z
E Z
Figure
ID
N
N
******
******
CR
ID
clock cycles. For the card address assignment,
Symbol
cycles
cycles
Figure 26
S
T
P
E
26. The symbols for
Z S T
Z S T
Identification Timing
through
SET_RCA Timing
CID/OCR
CID/OCR
Content
Content
Host Active
One-cycle pull-up (1)
(Host = 1, Card = 0)
RC
Transmitter bit
Start bit (0)
Definition
End bit (1)
and N
Figure 30
Z Z
Z Z
Figure 26
Z
Z
CC
Freescale Semiconductor
.
through