PALCE16V8-10JIT Cypress Semiconductor Corp, PALCE16V8-10JIT Datasheet - Page 5

• Manufacturer Part Number: PALCE16V8-10JIT
• Manufacturer: Cypress Semiconductor Corp

Specifications of PALCE16V8-10JIT

• Family Name: Pal®
• Process Technology: EECMOS
• # Macrocells: 8
• # I/os (max): 8
• Frequency (max): 83MHz
• Propagation Delay Time: 10ns
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: PLCC
• Supply Current: 130mA
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-03025 Rev. *A
AC Test Loads and Waveforms
Commercial and Industrial Switching Characteristics
t
t
t
t
t
t
t
t
t
t
t
t
Shaded areas contain preliminary information.
Notes:
10. This parameter is measured as the time after OE pin or internal disable input disables or enables the output pin. This delay is measured to the point at which a previous HIGH
11. This specification indicates the guaranteed maximum frequency at which a state machine configuration with external feedback can operate.
12. This specification indicates the guaranteed maximum frequency at which the device can operate in data path mode.
13. This specification indicates the guaranteed maximum frequency at which a state machine configuration with internal only feedback can operate.
14. This parameter is calculated from the clock period at f
Parameter
PD
PZX
PXZ
PD
PZX
PXZ
EA
ER
CO
S
H
P
8. Min. times are tested initially and after any design or process changes that may affect these parameters.
9. This specification is guaranteed for all device outputs changing state in a given access cycle.
, t
level has fallen to 0.5 volts below V
Specification
, t
, t
CO
EA
ER
Input to Output
Propagation Delay
OE to Output Enable
OE to Output Disable
Input to Output
Enable Delay
Input to Output
Disable Delay
Clock to Output Delay
Input or Feedback
Set-up Time
Input Hold Time
External Clock
Period (t
Description
CO
Closed
Z · H: Open
Z · L: Closed
H · Z: Open
L · Z: Closed
+ t
[7]
S
[7, 10]
OH
)
min. or a previous LOW level has risen to 0.5 volts above V
[8, 9]
S
1
[8, 9]
GND
3.0V
OUTPUT
< 2 ns
Min.
1
1
1
1
1
1
3
0
7
16V8-5
MAX
50 pF
5 pF
internal (1/f
C
Max.
L
5
6
5
6
5
4
10%
5V
MAX3
90%
ALL INPUT PULSES
Min.
S1
R1
R2
200Ω
10
3
2
5
0
) as measured (see Note 7 above) minus t
R
16V8-7
Commercial
1
Max.
7.5
6
6
9
9
5
C
L
390Ω
[2]
R
OL
2
Min.
14.5
7.5
max.
TEST POINT
3
2
0
16V8-10
90%
Max.
390Ω
10
10
10
10
10
R
7
10%
1
< 2 ns
Military
Min.
12
22
S
3
2
0
16V8-15
.
750Ω
R
2
Max.
15
15
15
15
15
10
Measured Output Value
PALCE16V8
Min.
H · Z: V
15
27
L · Z: V
3
2
0
16V8-25
1.5V
1.5V
Max.
OL
OH
25
20
20
25
25
12
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+ 0.5V
– 0.5V
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns