SSTE32882KA1AKG IDT, Integrated Device Technology Inc, SSTE32882KA1AKG Datasheet - Page 55

• Manufacturer Part Number: SSTE32882KA1AKG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of SSTE32882KA1AKG

• Lead Free Status / RoHS Status: Compliant

Control Words
CONTROL WORD DECODING
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
SSTE32882KA1
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
The device features a set of control words, which allow the optimization of the device properties for different raw card designs.
The different control words and settings are described below. Any change to these control words requires some time for the
device to settle. For changes to the control word setting, except for RC2 (bits DBA1 and DA3) and RC10, the controller needs
to wait t
timing (RC2: bits DBA1 and DA3) and RC10, this settling may take up to t
be kept high during that time. The Control Words can be accessed and written to when running within any one defined
frequency band.
The values to be programmed into each control word are presented on signals DA3, DA4, DBA0 and DBA1 simultaneously
with the assertion of the control word access through DCS0 and DCS1, or DCS2 and DCS3 in the QuadCS enabled mode, and
the address of the control word on DA0, DA1, DA2 and DBA2.
The reset default state of Control Words 0 .. 5 and Control Words 8 .. 15 is “0”. The reset default state for Control Words 6 and
7 is vendor specific. Every time the device is reset, its default state is restored. Stopping the clocks (CK = CK = low) to put the
device in low-power mode will not alter the control word settings.
MRD
after the last control word access, before further access to the DRAM can take place. For any changes to the clock
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE
STAB
55
time. All chip select inputs (DCS[n:0]) must
COMMERCIAL TEMPERATURE RANGE
SSTE32882KA1
7314/8