IRFR9210TR Vishay, IRFR9210TR Datasheet - Page 7

• Manufacturer Part Number: IRFR9210TR
• Description: MOSFET P-CHANNEL 200V
• Manufacturer: Vishay

Specifications of IRFR9210TR

• Rohs Compliant: NO
• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Standard
• Rds On (max) @ Id, Vgs: 3 Ohm @ 1.1A, 10V
• Drain To Source Voltage (vdss): 200V
• Current - Continuous Drain (id) @ 25° C: 1.9A
• Vgs(th) (max) @ Id: 4V @ 250µA
• Gate Charge (qg) @ Vgs: 8.9nC @ 10V
• Input Capacitance (ciss) @ Vds: 170pF @ 25V
• Power - Max: 2.5W
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (2 leads+tab), SC-63
• Configuration: Single
• Transistor Polarity: P-Channel
• Resistance Drain-source Rds (on): 3 Ohms
• Drain-source Breakdown Voltage: - 200 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 1.9 A
• Power Dissipation: 2.5 W
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91281.
Document Number: 91281
S09-0060-Rev. A, 02-Feb-09
Re-applied
voltage
Reverse
recovery
current
+
R
-
Compliment N-Channel of D.U.T. for driver
D.U.T.
G
*
Driver gate drive
D.U.T. I
D.U.T. V
Inductor current
V
GS
P.W.
= - 5 V for logic level and - 3 V drive devices
SD
DS
IRFR9210, IRFU9210, SiHFR9210, SiHFU9210
waveform
waveform
Peak Diode Recovery dV/dt Test Circuit
Ripple ≤ 5 %
Body diode forward drop
Period
Body diode forward
+
-
Fig. 14 - For P-Channel
• dV/dt controlled by R
• I
• D.U.T. - device under test
SD
Diode recovery
current
controlled by duty factor "D"
Circuit layout considerations
dV/dt
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
dI/dt
D =
-
G
Period
P.W.
+
V
V
I
SD
GS
DD
= - 10 V*
+
-
V
DD
Vishay Siliconix
www.vishay.com
7