LFEC3E-3FN256C LATTICE SEMICONDUCTOR, LFEC3E-3FN256C Datasheet - Page 46

• Manufacturer Part Number: LFEC3E-3FN256C
• Description: FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFEC3E-3FN256C

• Package: 256FBGA
• Family Name: LatticeEC
• Device Logic Units: 3100
• Maximum Internal Frequency: 340 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 160
• Ram Bits: 56320
• In System Programmability: Yes

Lattice Semiconductor
LVPECL
The LatticeECP/EC devices support differential LVPECL standard. This standard is emulated using complemen-
tary LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The LVPECL input standard
is supported by the LVDS differential input buffer. The scheme shown in Figure 3-3 is one possible solution for
point-to-point signals.
Figure 3-3. Differential LVPECL
Table 3-3. LVPECL DC Conditions
For further information about LVPECL, BLVDS and other differential interfaces please see the list of technical infor-
mation at the end of this data sheet.
Z
R
R
V
V
V
V
Z
I
1. For input buffer, see LVDS table.
DC
Parameter
OUT
OH
OL
OD
BACK
P
T
CM
3.3V
3.3V
Output impedance
Driver parallel resistor
Receiver termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
DC output current
Over Recommended Operating Conditions
1
Off-chip
100 ohms
100 ohms
Description
~150 ohms
Transmission line, Zo = 100 ohm differential
3-10
DC and Switching Characteristics
Typical
LatticeECP/EC Family Data Sheet
2.03
1.27
0.76
1.65
85.7
12.7
100
150
100
100 ohms
Units
ohm
ohm
ohm
ohm
mA
V
V
V
V
+
-