LFEC3E-3FN256C LATTICE SEMICONDUCTOR, LFEC3E-3FN256C Datasheet - Page 66

• Manufacturer Part Number: LFEC3E-3FN256C
• Description: FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFEC3E-3FN256C

• Package: 256FBGA
• Family Name: LatticeEC
• Device Logic Units: 3100
• Maximum Internal Frequency: 340 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 160
• Ram Bits: 56320
• In System Programmability: Yes

Lattice Semiconductor
Switching Test Conditions
Figure 3-21 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 3-6.
Figure 3-21. Output Test Load, LVTTL and LVCMOS Standards
Table 3-6. Test Fixture Required Components, Non-Terminated Interfaces
LVTTL and other LVCMOS settings (L -> H, H -> L)
LVCMOS 2.5 I/O (Z -> H)
LVCMOS 2.5 I/O (Z -> L)
LVCMOS 2.5 I/O (H -> Z)
LVCMOS 2.5 I/O (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
Test Condition
*CL Includes Test Fixture and Probe Capacitance
DUT
V
R1
T
3-30
188Ω
R
∞
1
CL*
0pF
0pF
C
L
Test Point
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
LVCMOS 1.5 = V
LVCMOS 1.2 = V
V
V
V
V
OH
OL
CCIO
CCIO
+ 0.15
- 0.15
/2
/2
Timing Ref.
CCIO
CCIO
CCIO
CCIO
/2
/2
/2
/2
V
V
V
V
V
—
—
—
—
—
OH
OH
OL
OL
T